util/statetrace/arch/arm/tracechild.cc

   1 /*
   2  * Copyright (c) 2010 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2006-2009 The Regents of The University of Michigan
  15  * All rights reserved.
  16  *
  17  * Redistribution and use in source and binary forms, with or without
  18  * modification, are permitted provided that the following conditions are
  19  * met: redistributions of source code must retain the above copyright
  20  * notice, this list of conditions and the following disclaimer;
  21  * redistributions in binary form must reproduce the above copyright
  22  * notice, this list of conditions and the following disclaimer in the
  23  * documentation and/or other materials provided with the distribution;
  24  * neither the name of the copyright holders nor the names of its
  25  * contributors may be used to endorse or promote products derived from
  26  * this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39  *
  40  * Authors: Ali Saidi
  41  *          Gabe Black
  42  */
  43
  44 #include <stdint.h>
  45
  46 #include <cerrno>
  47 #include <cstdio>
  48 #include <cstring>
  49 #include <iostream>
  50
  51 #include "arch/arm/tracechild.hh"
  52
  53 using namespace std;
  54
  55 ARMTraceChild::ARMTraceChild()
  56 {
  57     foundMvn = false;
  58
  59     for (int x = 0; x < numregs; x++) {
  60         memset(&regs, 0, sizeof(regs));
  61         memset(&oldregs, 0, sizeof(regs));
  62         regDiffSinceUpdate[x] = false;
  63     }
  64 }
  65
  66 bool
  67 ARMTraceChild::sendState(int socket)
  68 {
  69     uint32_t regVal = 0;
  70     uint32_t message[numregs + 1];
  71     int pos = 1;
  72     message[0] = 0;
  73     for (int x = 0; x < numregs; x++) {
  74         if (regDiffSinceUpdate[x]) {
  75             message[0] = message[0] | (1 << x);
  76             message[pos++] = getRegVal(x);
  77         }
  78     }
  79
  80     size_t sent = 0;
  81     size_t toSend = pos * sizeof(message[0]);
  82     uint8_t *messagePtr = (uint8_t *)message;
  83     while (toSend != 0) {
  84         sent = write(socket, messagePtr, toSend);
  85         if (sent == -1) {
  86             cerr << "Write failed! " << strerror(errno) << endl;
  87             tracing = false;
  88             return false;
  89         }
  90         toSend -= sent;
  91         messagePtr += sent;
  92     }
  93
  94     return true;
  95 }
  96
  97 uint32_t
  98 ARMTraceChild::getRegs(user_regs &myregs, int num)
  99 {
 100     assert(num < numregs && num >= 0);
 101     return myregs.uregs[num];
 102 }
 103
 104 bool
 105 ARMTraceChild::update(int pid)
 106 {
 107     oldregs = regs;
 108     if (ptrace(PTRACE_GETREGS, pid, 0, &regs) != 0) {
 109         cerr << "update: " << strerror(errno) << endl;
 110         return false;
 111     }
 112
 113     for (unsigned int x = 0; x < numregs; x++)
 114         regDiffSinceUpdate[x] = (getRegVal(x) != getOldRegVal(x));
 115     return true;
 116 }
 117
 118 int64_t
 119 ARMTraceChild::getRegVal(int num)
 120 {
 121     return getRegs(regs, num);
 122 }
 123
 124 int64_t
 125 ARMTraceChild::getOldRegVal(int num)
 126 {
 127     return getRegs(oldregs,  num);
 128 }
 129
 130 ostream &
 131 ARMTraceChild::outputStartState(ostream & os)
 132 {
 133     uint32_t sp = getSP();
 134     uint32_t pc = getPC();
 135     uint32_t highestInfo = 0;
 136     char obuf[1024];
 137     sprintf(obuf, "Initial stack pointer = 0x%08x\n", sp);
 138     os << obuf;
 139     sprintf(obuf, "Initial program counter = 0x%08x\n", pc);
 140     os << obuf;
 141
 142     //Output the argument count
 143     int32_t cargc = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
 144     sprintf(obuf, "0x%08x: Argc = 0x%08x\n", sp, cargc);
 145     os << obuf;
 146     sp += 4;
 147
 148     //Output argv pointers
 149     int argCount = 0;
 150     int32_t cargv;
 151     do {
 152         cargv = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
 153         sprintf(obuf, "0x%08x: argv[%d] = 0x%08x\n",
 154                 sp, argCount++, cargv);
 155         if(cargv)
 156             if(highestInfo < cargv)
 157                 highestInfo = cargv;
 158         os << obuf;
 159         sp += 4;
 160     } while(cargv);
 161
 162     //Output the envp pointers
 163     int envCount = 0;
 164     uint32_t cenvp;
 165     do {
 166         cenvp = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
 167         sprintf(obuf, "0x%08x: envp[%d] = 0x%08x\n",
 168                 sp, envCount++, cenvp);
 169         os << obuf;
 170         sp += 4;
 171     } while(cenvp);
 172     uint32_t auxType, auxVal;
 173     do {
 174         auxType = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
 175         sp += 4;
 176         auxVal = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
 177         sp += 4;
 178         sprintf(obuf, "0x%08x: Auxiliary vector = {0x%08x, 0x%08x}\n",
 179                 sp - 8, auxType, auxVal);
 180         os << obuf;
 181     } while(auxType != 0 || auxVal != 0);
 182     //Print out the argument strings, environment strings, and file name.
 183     string current;
 184     uint32_t buf;
 185     uint32_t currentStart = sp;
 186     bool clearedInitialPadding = false;
 187     do {
 188         buf = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
 189         char * cbuf = (char *)&buf;
 190         for (int x = 0; x < sizeof(uint32_t); x++) {
 191             if (cbuf[x])
 192                 current += cbuf[x];
 193             else {
 194                 sprintf(obuf, "0x%08x: \"%s\"\n",
 195                         currentStart, current.c_str());
 196                 os << obuf;
 197                 current = "";
 198                 currentStart = sp + x + 1;
 199             }
 200         }
 201         sp += 4;
 202         clearedInitialPadding = clearedInitialPadding || buf != 0;
 203     } while(!clearedInitialPadding || buf != 0 || sp <= highestInfo);
 204     return os;
 205 }
 206
 207 bool
 208 ARMTraceChild::step()
 209 {
 210     const uint32_t bkpt_inst = 0xe7f001f0;
 211
 212     uint32_t lr = getRegVal(14);
 213     uint32_t pc = getPC();
 214     uint32_t lrOp, subsOp;
 215     char obuf[128];
 216     bool patch = false;
 217
 218     // Since ARM uses software breakpoints behind the scenes, they don't work
 219     // in read only areas like the page of routines provided by the kernel. The
 220     // link register generally holds the address the process wants to the
 221     // kernel to return to after it's done, so we'll install a software
 222     // breakpoint there.
 223     //
 224     // Calls into the kernel user page always follow the form:
 225     //  MVN ...
 226     //  <possible MOV lr,...>
 227     //  SUB PC, ...
 228     //
 229     //  So we look for this pattern and set a breakpoint on the LR at the SUB
 230     //  instruction.
 231
 232
 233     subsOp = ptrace(PTRACE_PEEKDATA, pid, pc, 0);
 234     if ((subsOp & 0xFFFF0FFF) == 0xe3e00a0f)
 235         foundMvn = true;
 236
 237     if (foundMvn && ((subsOp & 0xFFF0F000) == 0xe240f000)) {
 238         foundMvn = false;
 239         lrOp = ptrace(PTRACE_PEEKDATA, pid, lr, 0);
 240         ptrace(PTRACE_POKEDATA, pid, lr, bkpt_inst);
 241         patch = true;
 242     }
 243     ptraceSingleStep();
 244
 245     if (patch)
 246         ptrace(PTRACE_POKEDATA, pid, lr, lrOp);
 247 }
 248
 249
 250 TraceChild *
 251 genTraceChild()
 252 {
 253     return new ARMTraceChild;
 254 }
 255