9a4dc1921d9c4ce1637128eb2857ce0ff94edc79
[gem5.git] / util / statetrace / arch / arm / tracechild.hh
1 /*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2009 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 * Gabe Black
42 */
43
44 #ifndef TRACECHILD_ARM_HH
45 #define TRACECHILD_ARM_HH
46
47 #include <sys/ptrace.h>
48 #include <sys/user.h>
49
50 #include <cassert>
51 #include <string>
52
53 #include "base/tracechild.hh"
54
55 class ARMTraceChild : public TraceChild
56 {
57 public:
58 enum RegNum
59 {
60 // r0 - r3 argument, temp, caller save
61 // r4 - r10 callee save
62 // r11 - FP
63 // r12 - temp
64 // r13 - stack
65 // r14 - link
66 // r15 - pc
67 R0, R1, R2, R3, R4, R5, R6, R7,
68 R8, R9, R10, FP, R12, SP, LR, PC,
69 CPSR,
70 numregs
71 };
72 private:
73 uint32_t getRegs(user_regs& myregs, int num);
74 user_regs regs;
75 user_regs oldregs;
76 bool regDiffSinceUpdate[numregs];
77 bool foundMvn;
78
79 protected:
80 bool update(int pid);
81
82 public:
83 ARMTraceChild();
84 bool sendState(int socket);
85
86 int64_t getRegVal(int num);
87 int64_t getOldRegVal(int num);
88
89 bool step();
90
91 uint64_t
92 getPC()
93 {
94 return getRegVal(PC);
95 }
96
97 uint64_t
98 getSP()
99 {
100 return getRegVal(SP);
101 }
102
103 std::ostream & outputStartState(std::ostream & os);
104
105 };
106
107 #endif
108