util/statetrace/arch/tracechild_arm.cc

   1 /*
   2  * Copyright (c) 2010 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2006-2009 The Regents of The University of Michigan
  15  * All rights reserved.
  16  *
  17  * Redistribution and use in source and binary forms, with or without
  18  * modification, are permitted provided that the following conditions are
  19  * met: redistributions of source code must retain the above copyright
  20  * notice, this list of conditions and the following disclaimer;
  21  * redistributions in binary form must reproduce the above copyright
  22  * notice, this list of conditions and the following disclaimer in the
  23  * documentation and/or other materials provided with the distribution;
  24  * neither the name of the copyright holders nor the names of its
  25  * contributors may be used to endorse or promote products derived from
  26  * this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39  *
  40  * Authors: Ali Saidi
  41  *          Gabe Black
  42  */
  43
  44 #include <iostream>
  45 #include <errno.h>
  46 #include <stdint.h>
  47 #include <cstring>
  48 #include <cstdio>
  49
  50 #include "tracechild_arm.hh"
  51
  52 using namespace std;
  53
  54 const char* ARMTraceChild::regNames[numregs] = {
  55     "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
  56     "r8", "r9", "r10", "fp", "r12", "sp", "lr", "pc",
  57     "cpsr" };
  58
  59
  60 ARMTraceChild::ARMTraceChild()
  61 {
  62     foundMvn = false;
  63
  64     for (int x = 0; x < numregs; x++) {
  65         memset(&regs, 0, sizeof(regs));
  66         memset(&oldregs, 0, sizeof(regs));
  67         regDiffSinceUpdate[x] = false;
  68     }
  69 }
  70
  71 bool
  72 ARMTraceChild::sendState(int socket)
  73 {
  74     uint32_t regVal = 0;
  75     uint32_t message[numregs + 1];
  76     int pos = 1;
  77     message[0] = 0;
  78     for (int x = 0; x < numregs; x++) {
  79         if (regDiffSinceUpdate[x]) {
  80             message[0] = message[0] | (1 << x);
  81             message[pos++] = getRegVal(x);
  82         }
  83     }
  84
  85     size_t sent = 0;
  86     size_t toSend = pos * sizeof(message[0]);
  87     uint8_t *messagePtr = (uint8_t *)message;
  88     while (toSend != 0) {
  89         sent = write(socket, messagePtr, toSend);
  90         if (sent == -1) {
  91             cerr << "Write failed! " << strerror(errno) << endl;
  92             tracing = false;
  93             return false;
  94         }
  95         toSend -= sent;
  96         messagePtr += sent;
  97     }
  98
  99     return true;
 100 }
 101
 102 uint32_t
 103 ARMTraceChild::getRegs(user_regs &myregs, int num)
 104 {
 105     assert(num < numregs && num >= 0);
 106     return myregs.uregs[num];
 107 }
 108
 109 bool
 110 ARMTraceChild::update(int pid)
 111 {
 112     oldregs = regs;
 113     if (ptrace(PTRACE_GETREGS, pid, 0, &regs) != 0) {
 114         cerr << "update: " << strerror(errno) << endl;
 115         return false;
 116     }
 117
 118     for (unsigned int x = 0; x < numregs; x++)
 119         regDiffSinceUpdate[x] = (getRegVal(x) != getOldRegVal(x));
 120     return true;
 121 }
 122
 123 int64_t
 124 ARMTraceChild::getRegVal(int num)
 125 {
 126     return getRegs(regs, num);
 127 }
 128
 129 int64_t
 130 ARMTraceChild::getOldRegVal(int num)
 131 {
 132     return getRegs(oldregs,  num);
 133 }
 134
 135 char *
 136 ARMTraceChild::printReg(int num)
 137 {
 138     sprintf(printBuffer, "0x%08X", (uint32_t)getRegVal(num));
 139     return printBuffer;
 140 }
 141
 142 ostream &
 143 ARMTraceChild::outputStartState(ostream & os)
 144 {
 145     uint32_t sp = getSP();
 146     uint32_t pc = getPC();
 147     uint32_t highestInfo = 0;
 148     char obuf[1024];
 149     sprintf(obuf, "Initial stack pointer = 0x%08x\n", sp);
 150     os << obuf;
 151     sprintf(obuf, "Initial program counter = 0x%08x\n", pc);
 152     os << obuf;
 153
 154     //Output the argument count
 155     int32_t cargc = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
 156     sprintf(obuf, "0x%08x: Argc = 0x%08x\n", sp, cargc);
 157     os << obuf;
 158     sp += 4;
 159
 160     //Output argv pointers
 161     int argCount = 0;
 162     int32_t cargv;
 163     do {
 164         cargv = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
 165         sprintf(obuf, "0x%08x: argv[%d] = 0x%08x\n",
 166                 sp, argCount++, cargv);
 167         if(cargv)
 168             if(highestInfo < cargv)
 169                 highestInfo = cargv;
 170         os << obuf;
 171         sp += 4;
 172     } while(cargv);
 173
 174     //Output the envp pointers
 175     int envCount = 0;
 176     uint32_t cenvp;
 177     do {
 178         cenvp = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
 179         sprintf(obuf, "0x%08x: envp[%d] = 0x%08x\n",
 180                 sp, envCount++, cenvp);
 181         os << obuf;
 182         sp += 4;
 183     } while(cenvp);
 184     uint32_t auxType, auxVal;
 185     do {
 186         auxType = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
 187         sp += 4;
 188         auxVal = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
 189         sp += 4;
 190         sprintf(obuf, "0x%08x: Auxiliary vector = {0x%08x, 0x%08x}\n",
 191                 sp - 8, auxType, auxVal);
 192         os << obuf;
 193     } while(auxType != 0 || auxVal != 0);
 194     //Print out the argument strings, environment strings, and file name.
 195     string current;
 196     uint32_t buf;
 197     uint32_t currentStart = sp;
 198     bool clearedInitialPadding = false;
 199     do {
 200         buf = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
 201         char * cbuf = (char *)&buf;
 202         for (int x = 0; x < sizeof(uint32_t); x++) {
 203             if (cbuf[x])
 204                 current += cbuf[x];
 205             else {
 206                 sprintf(obuf, "0x%08x: \"%s\"\n",
 207                         currentStart, current.c_str());
 208                 os << obuf;
 209                 current = "";
 210                 currentStart = sp + x + 1;
 211             }
 212         }
 213         sp += 4;
 214         clearedInitialPadding = clearedInitialPadding || buf != 0;
 215     } while(!clearedInitialPadding || buf != 0 || sp <= highestInfo);
 216     return os;
 217 }
 218
 219 bool
 220 ARMTraceChild::step()
 221 {
 222     const uint32_t bkpt_inst = 0xe7f001f0;
 223
 224     uint32_t lr = getRegVal(14);
 225     uint32_t pc = getPC();
 226     uint32_t lrOp, subsOp;
 227     char obuf[128];
 228     bool patch = false;
 229
 230     // Since ARM uses software breakpoints behind the scenes, they don't work
 231     // in read only areas like the page of routines provided by the kernel. The
 232     // link register generally holds the address the process wants to the
 233     // kernel to return to after it's done, so we'll install a software
 234     // breakpoint there.
 235     //
 236     // Calls into the kernel user page always follow the form:
 237     //  MVN ...
 238     //  <possible MOV lr,...>
 239     //  SUB PC, ...
 240     //
 241     //  So we look for this pattern and set a breakpoint on the LR at the SUB
 242     //  instruction.
 243
 244
 245     subsOp = ptrace(PTRACE_PEEKDATA, pid, pc, 0);
 246     if ((subsOp & 0xFFFF0FFF) == 0xe3e00a0f)
 247         foundMvn = true;
 248
 249     if (foundMvn && ((subsOp & 0xFFF0F000) == 0xe240f000)) {
 250         foundMvn = false;
 251         lrOp = ptrace(PTRACE_PEEKDATA, pid, lr, 0);
 252         ptrace(PTRACE_POKEDATA, pid, lr, bkpt_inst);
 253         patch = true;
 254     }
 255     ptraceSingleStep();
 256
 257     if (patch)
 258         ptrace(PTRACE_POKEDATA, pid, lr, lrOp);
 259 }
 260
 261
 262 TraceChild *
 263 genTraceChild()
 264 {
 265     return new ARMTraceChild;
 266 }
 267