util/statetrace/arch/tracechild_arm.hh

   1 /*
   2  * Copyright (c) 2010 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2009 The Regents of The University of Michigan
  15  * All rights reserved.
  16  *
  17  * Redistribution and use in source and binary forms, with or without
  18  * modification, are permitted provided that the following conditions are
  19  * met: redistributions of source code must retain the above copyright
  20  * notice, this list of conditions and the following disclaimer;
  21  * redistributions in binary form must reproduce the above copyright
  22  * notice, this list of conditions and the following disclaimer in the
  23  * documentation and/or other materials provided with the distribution;
  24  * neither the name of the copyright holders nor the names of its
  25  * contributors may be used to endorse or promote products derived from
  26  * this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39  *
  40  * Authors: Ali Saidi
  41  *          Gabe Black
  42  */
  43
  44 #ifndef TRACECHILD_ARM_HH
  45 #define TRACECHILD_ARM_HH
  46
  47 #include <cassert>
  48 #include <string>
  49 #include <sys/user.h>
  50 #include <sys/ptrace.h>
  51 #include "tracechild.hh"
  52
  53
  54 class ARMTraceChild : public TraceChild
  55 {
  56   public:
  57     enum RegNum
  58     {
  59         // r0 - r3 argument, temp, caller save
  60         // r4 - r10 callee save
  61         // r11 - FP
  62         // r12 - temp
  63         // r13 - stack
  64         // r14 - link
  65         // r15 - pc
  66         R0, R1, R2, R3, R4, R5, R6, R7,
  67         R8, R9, R10, FP, R12, SP, LR, PC,
  68         CPSR,
  69         numregs
  70     };
  71   private:
  72     char printBuffer[256];
  73     static const char *regNames[numregs];
  74     uint32_t getRegs(user_regs& myregs, int num);
  75     user_regs regs;
  76     user_regs oldregs;
  77     bool regDiffSinceUpdate[numregs];
  78     bool foundMvn;
  79
  80   protected:
  81     bool update(int pid);
  82
  83   public:
  84     ARMTraceChild();
  85     bool sendState(int socket);
  86
  87     int getNumRegs()
  88     {
  89         return numregs;
  90     }
  91
  92     bool diffSinceUpdate(int num)
  93     {
  94         assert(num < numregs && num >= 0);
  95         return regDiffSinceUpdate[num];
  96     }
  97
  98     std::string getRegName(int num)
  99     {
 100         assert(num < numregs && num >= 0);
 101         return regNames[num];
 102     }
 103
 104     int64_t getRegVal(int num);
 105     int64_t getOldRegVal(int num);
 106
 107     bool step();
 108
 109     uint64_t getPC()
 110     {
 111             return getRegVal(PC);
 112     }
 113
 114     uint64_t getSP()
 115     {
 116             return getRegVal(SP);
 117     }
 118
 119     char * printReg(int num);
 120
 121     std::ostream & outputStartState(std::ostream & os);
 122
 123 };
 124
 125 #endif
 126