util/tlm/master_transactor.hh

   1 /*
   2  * Copyright (c) 2016, Dresden University of Technology (TU Dresden)
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met:
   8  *
   9  * 1. Redistributions of source code must retain the above copyright notice,
  10  *    this list of conditions and the following disclaimer.
  11  *
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * 3. Neither the name of the copyright holder nor the names of its
  17  *    contributors may be used to endorse or promote products derived from
  18  *    this software without specific prior written permission.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  23  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
  24  * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  25  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  26  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  27  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  28  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  29  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  30  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  *
  32  * Authors: Christian Menard
  33  */
  34
  35 #ifndef __GEM5_MASTER_TRANSACTOR_HH__
  36 #define __GEM5_MASTER_TRANSACTOR_HH__
  37
  38 #include <tlm_utils/simple_target_socket.h>
  39
  40 #include <systemc>
  41 #include <tlm>
  42
  43 #include "sc_master_port.hh"
  44 #include "sim_control_if.hh"
  45
  46 namespace Gem5SystemC
  47 {
  48
  49 class Gem5MasterTransactor : public sc_core::sc_module
  50 {
  51   public:
  52     // module interface
  53     tlm_utils::simple_target_socket<SCMasterPort> socket;
  54     sc_core::sc_port<Gem5SimControlInterface> sim_control;
  55
  56   private:
  57     std::string portName;
  58
  59   public:
  60     SC_HAS_PROCESS(Gem5MasterTransactor);
  61
  62     Gem5MasterTransactor(sc_core::sc_module_name name,
  63                          const std::string& portName);
  64
  65     void before_end_of_elaboration();
  66 };
  67
  68 }
  69
  70 #endif