verilog/s6ddrphy/patches/s6ddrphy.diff

   1 Index: s6ddrphy/spartan6_soft_phy.v
   2 ===================================================================
   3 --- s6ddrphy.orig/spartan6_soft_phy.v
   4 +++ s6ddrphy/spartan6_soft_phy.v
   5 @@ -116,7 +116,6 @@ module spartan6_soft_phy # (
   6      inout  [NUM_DQ-1:0]                         sd_dq,                          // Data in from SDRAM device
   7      output [NUM_DQS-1:0]                        sd_dm,                          // Data mask to SDRAM devices
   8      inout  [NUM_DQS-1:0]                        sd_dqs,                         // DQS
   9 -    inout  [NUM_DQS-1:0]                        sd_dqs_n,                       // complimentary DQS
  10
  11      // configuration ports
  12      input  [2:0]                                cfg_al,                         // Posted CAS additive latency
  13 @@ -300,12 +299,11 @@ genvar j;
  14  generate
  15      for (j = 0; j < NUM_DQ/8*(NIBBLE_DEVICES+1) ; j = j + 1)
  16      begin:dqs_iob
  17 -        IOBUFDS iobufds (
  18 +        IOBUF iobufds (
  19              .O              (sd_dqs_in[j]),
  20              .I              (sd_dqs_out[j]),
  21              .T              (sd_dqs_oe_n[j]),
  22 -            .IO             (sd_dqs[j]),
  23 -            .IOB            (sd_dqs_n[j])
  24 +            .IO             (sd_dqs[j])
  25              );
  26      end
  27  endgenerate