1 # Zftrans - transcendental operations
5 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127>
6 * <https://www.khronos.org/registry/spir-v/specs/unified1/OpenCL.ExtendedInstructionSet.100.html>
7 * Discussion: <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-August/002342.html>
8 * [[rv_major_opcode_1010011]] for opcode listing.
9 * [[zfpacc_proposal]] for accuracy settings proposal
13 * **Zftrans**: standard transcendentals (best suited to 3D)
14 * **ZftransExt**: extra functions (useful, not generally needed for 3D,
15 can be synthesised using Ztrans)
16 * **Ztrigpi**: trig. xxx-pi sinpi cospi tanpi
17 * **Ztrignpi**: trig non-xxx-pi sin cos tan
18 * **Zarctrigpi**: arc-trig. a-xxx-pi: atan2pi asinpi acospi
19 * **Zarctrignpi**: arc-trig. non-a-xxx-pi: atan2, asin, acos
20 * **Zfhyp**: hyperbolic/inverse-hyperbolic. sinh, cosh, tanh, asinh,
21 acosh, atanh (can be synthesised - see below)
22 * **ZftransAdv**: much more complex to implement in hardware
23 * **Zfrsqrt**: Reciprocal square-root.
25 Minimum recommended requirements for 3D: Zftrans, Ztrigpi, Zarctrigpi,
32 * Decision on accuracy, moved to [[zfpacc_proposal]]
33 <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-August/002355.html>
34 * Errors **MUST** be repeatable.
35 * How about four Platform Specifications? 3DUNIX, UNIX, 3DEmbedded and Embedded?
36 <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-August/002361.html>
37 Accuracy requirements for dual (triple) purpose implementations must
38 meet the higher standard.
39 * Reciprocal Square-root is in its own separate extension (Zfrsqrt) as
40 it is desirable on its own by other implementors. This to be evaluated.
43 # List of 2-arg opcodes
46 opcode | Description | pseudo-code | Extension |
47 FATAN2 | atan2 arc tangent | rd = atan2(rs2, rs1) | Zarctrignpi |
48 FATAN2PI | atan arc tangent / pi | rd = atan2(rs2, rs1) / pi | Zarctrigpi |
49 FPOW | x power of y | rd = pow(rs1, rs2) | ZftransAdv |
50 FROOT | x power 1/y | rd = pow(rs1, 1/rs2) | ZftransAdv |
51 FHYPOT | hypotenuse | rd = sqrt(rs1^2 + rs2^2) | Zftrans |
54 # List of 1-arg transcendental opcodes
57 opcode | Description | pseudo-code | Extension |
58 FRSQRT | Reciprocal Square-root | rd = sqrt(rs1) | Zfrsqrt |
59 FCBRT | Cube Root | rd = pow(rs1, 3) | Zftrans |
60 FEXP2 | power-of-2 | rd = pow(2, rs1) | Zftrans |
61 FLOG2 | log2 | rd = log2(rs1) | Zftrans |
62 FEXPM1 | exponent minus 1 | rd = pow(e, rs1) - 1.0 | Zftrans |
63 FLOG1P | log plus 1 | rd = log(e, 1 + rs1) | Zftrans |
64 FEXP | exponent | rd = pow(e, rs1) | ZftransExt |
65 FLOG | natural log (base e) | rd = log(e, rs1) | ZftransExt |
66 FEXP10 | power-of-10 | rd = pow(10, rs1) | ZftransExt |
67 FLOG10 | log base 10 | rd = log10(rs1) | ZftransExt |
70 # List of 1-arg trigonometric opcodes
73 opcode | Description | pseudo-code | Extension |
74 FSIN | sin (radians) | rd = sin(rs1) | Ztrignpi |
75 FCOS | cos (radians) | rd = cos(rs1) | Ztrignpi |
76 FTAN | tan (radians) | rd = tan(rs1) | Ztrignpi |
77 FASIN | arcsin (radians) | rd = asin(rs1) | Zarctrignpi |
78 FACOS | arccos (radians) | rd = acos(rs1) | Zarctrignpi |
79 FSINPI | sin times pi | rd = sin(pi * rs1) | Ztrigpi |
80 FCOSPI | cos times pi | rd = cos(pi * rs1) | Ztrigpi |
81 FTANPI | tan times pi | rd = tan(pi * rs1) | Ztrigpi |
82 FASINPI | arcsin times pi | rd = asin(pi * rs1) | Zarctrigpi |
83 FACOSPI | arccos times pi | rd = acos(pi * rs1) | Zarctrigpi |
84 FATANPI | arctan times pi | rd = atan(pi * rs1) | Zarctrigpi |
85 FSINH | hyperbolic sin (radians) | rd = sinh(rs1) | Zfhyp |
86 FCOSH | hyperbolic cos (radians) | rd = cosh(rs1) | Zfhyp |
87 FTANH | hyperbolic tan (radians) | rd = tanh(rs1) | Zfhyp |
88 FASINH | inverse hyperbolic sin | rd = asinh(rs1) | Zfhyp |
89 FACOSH | inverse hyperbolic cos | rd = acosh(rs1) | Zfhyp |
90 FATANH | inverse hyperbolic tan | rd = atanh(rs1) | Zfhyp |
93 # List of Our Proposed Functions vs Khronos OpenCL Functions
96 Our proposed opcode | OpenCL FP32 | OpenCL FP16 | OpenCL native | OpenCL fast |
97 FSIN | sin | half_sin | native_sin | NONE |
98 FCOS | cos | half_cos | native_cos | NONE |
99 FTAN | tan | half_tan | native_tan | NONE |
100 FASIN | asin | NONE | NONE | NONE |
101 FACOS | acos | NONE | NONE | NONE |
102 FSINPI | sinpi | NONE | NONE | NONE |
103 FCOSPI | cospi | NONE | NONE | NONE |
104 FTANPI | tanpi | NONE | NONE | NONE |
105 FASINPI | asinpi | NONE | NONE | NONE |
106 FACOSPI | acospi | NONE | NONE | NONE |
107 FATANPI | atanpi | NONE | NONE | NONE |
108 FSINH | sinh | NONE | NONE | NONE |
109 FCOSH | cosh | NONE | NONE | NONE |
110 FTANH | tanh | NONE | NONE | NONE |
111 FASINH | asinh | NONE | NONE | NONE |
112 FACOSH | acosh | NONE | NONE | NONE |
113 FATANH | atanh | NONE | NONE | NONE |
114 FRSQRT | rsqrt | half_rsqrt | native_rsqrt | NONE |
115 FCBRT | cbrt | NONE | NONE | NONE |
116 FEXP2 | exp2 | half_exp2 | native_exp2 | NONE |
117 FLOG2 | log2 | half_log2 | native_log2 | NONE |
118 FEXPM1 | expm1 | NONE | NONE | NONE |
119 FLOG1P | log1p | NONE | NONE | NONE |
120 FEXP | exp | half_exp | native_exp | NONE |
121 FLOG | log | half_log | native_log | NONE |
122 FEXP10 | exp10 | half_exp10 | native_exp10 | NONE |
123 FLOG10 | log10 | half_log10 | native_log10 | NONE |
126 # Synthesis, Pseudo-code ops and macro-ops
128 The pseudo-ops are best left up to the compiler rather than being actual
129 pseudo-ops, by allocating one scalar FP register for use as a constant
130 (loop invariant) set to "1.0" at the beginning of a function or other
133 * FRCP rd, rs1 - pseudo-code alias for rd = 1.0 / rs1
134 * FATAN - pseudo-code alias for rd = atan2(rs1, 1.0) - FATAN2
135 * FATANPI - pseudo alias for rd = atan2pi(rs1, 1.0) - FATAN2PI
136 * FSINCOS - fused macro-op between FSIN and FCOS (issued in that order).
137 * FSINCOSPI - fused macro-op between FSINPI and FCOSPI (issued in that order).
139 FATANPI example pseudo-code:
141 lui t0, 0x3F800 // upper bits of f32 1.0
143 fatan2pi.s rd, rs1, ft0
145 Hypotenuse example (obviates need for Zfhyp except for high-performance):
147 ASINH( x ) = ln( x + SQRT(x**2+1)
151 LOG(x) = LOGP1(x) + 1.0
152 EXP(x) = EXPM1(x-1.0)
154 # To evaluate: should LOG be replaced with LOG1P (and EXP with EXPM1)?
156 RISC principle says "exclude LOG because it's covered by LOGP1 plus an ADD".
157 Research needed to ensure that implementors are not compromised by such
159 <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-August/002358.html>