08d972df24c00b2fe2dc1f3121a89d0594875bb7
[buildroot.git] /
1 Index: gcc-4.2.2/gcc/config/avr32/avr32.md
2 ===================================================================
3 --- gcc-4.2.2.orig/gcc/config/avr32/avr32.md 2008-09-19 14:23:34.000000000 +0200
4 +++ gcc-4.2.2/gcc/config/avr32/avr32.md 2008-09-19 14:30:18.000000000 +0200
5 @@ -803,14 +803,22 @@
6 (define_insn "*movsf_internal"
7 [(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,r,r,m")
8 (match_operand:SF 1 "general_operand" "r, G,F,m,r"))]
9 - "TARGET_SOFT_FLOAT
10 - && (register_operand (operands[0], SFmode)
11 - || register_operand (operands[1], SFmode))"
12 + "(register_operand (operands[0], SFmode)
13 + || register_operand (operands[1], SFmode))"
14 {
15 switch (which_alternative) {
16 case 0:
17 case 1: return "mov\t%0, %1";
18 - case 2: return "mov\t%0, lo(%1)\;orh\t%0, hi(%1)";
19 + case 2:
20 + {
21 + HOST_WIDE_INT target_float[2];
22 + real_to_target (target_float, CONST_DOUBLE_REAL_VALUE (operands[1]), SFmode);
23 + if ( TARGET_V2_INSNS
24 + && avr32_hi16_immediate_operand (GEN_INT (target_float[0]), VOIDmode) )
25 + return "movh\t%0, hi(%1)";
26 + else
27 + return "mov\t%0, lo(%1)\;orh\t%0, hi(%1)";
28 + }
29 case 3:
30 if ( (REG_P(XEXP(operands[1], 0))
31 && REGNO(XEXP(operands[1], 0)) == SP_REGNUM)