git.libre-soc.org Git - buildroot.git/blob

   1 From bb04c220d82598066eeadf49defaec1157d4d206 Mon Sep 17 00:00:00 2001
   2 From: Romain Naour <romain.naour@gmail.com>
   3 Date: Sat, 25 Jul 2020 11:46:01 +0200
   4 Subject: [PATCH] mips: Do not include hi and lo in clobber list for R6
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 From [1]
  10 "GCC 10 (PR 91233) won't silently allow registers that are not architecturally
  11 available to be present in the clobber list anymore, resulting in build failure
  12 for mips*r6 targets in form of:
  13 ...
  14 .../sysdep.h:146:2: error: the register ‘lo’ cannot be clobbered in ‘asm’ for the current target
  15   146 |  __asm__ volatile (      \
  16       |  ^~~~~~~
  17
  18 This is because base R6 ISA doesn't define hi and lo registers w/o DSP extension.
  19 This patch provides the alternative clobber list for r6 targets that won't include
  20 those registers."
  21
  22 Since kernel 5.4 and mips support for generic vDSO [2], the kernel fail to build
  23 for mips r6 cpus with gcc 10 for the same reason as glibc.
  24
  25 [1] https://sourceware.org/git/?p=glibc.git;a=commit;h=020b2a97bb15f807c0482f0faee2184ed05bcad8
  26 [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=24640f233b466051ad3a5d2786d2951e43026c9d
  27
  28 Signed-off-by: Romain Naour <romain.naour@gmail.com>
  29 ---
  30  arch/mips/include/asm/vdso/gettimeofday.h | 45 +++++++++++++++++++++++
  31  1 file changed, 45 insertions(+)
  32
  33 diff --git a/arch/mips/include/asm/vdso/gettimeofday.h b/arch/mips/include/asm/vdso/gettimeofday.h
  34 index 0ae9b4cbc153..ea600e0ebfe7 100644
  35 --- a/arch/mips/include/asm/vdso/gettimeofday.h
  36 +++ b/arch/mips/include/asm/vdso/gettimeofday.h
  37 @@ -36,12 +36,21 @@ static __always_inline long gettimeofday_fallback(
  38         register long nr asm("v0") = __NR_gettimeofday;
  39         register long error asm("a3");
  40
  41 +#if MIPS_ISA_REV >= 6
  42 +       asm volatile(
  43 +       "       syscall\n"
  44 +       : "=r" (ret), "=r" (error)
  45 +       : "r" (tv), "r" (tz), "r" (nr)
  46 +       : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
  47 +         "$14", "$15", "$24", "$25", "memory");
  48 +#else
  49         asm volatile(
  50         "       syscall\n"
  51         : "=r" (ret), "=r" (error)
  52         : "r" (tv), "r" (tz), "r" (nr)
  53         : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
  54           "$14", "$15", "$24", "$25", "hi", "lo", "memory");
  55 +#endif
  56
  57         return error ? -ret : ret;
  58  }
  59 @@ -60,12 +69,21 @@ static __always_inline long clock_gettime_fallback(
  60  #endif
  61         register long error asm("a3");
  62
  63 +#if MIPS_ISA_REV >= 6
  64 +       asm volatile(
  65 +       "       syscall\n"
  66 +       : "=r" (ret), "=r" (error)
  67 +       : "r" (clkid), "r" (ts), "r" (nr)
  68 +       : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
  69 +         "$14", "$15", "$24", "$25", "memory");
  70 +#else
  71         asm volatile(
  72         "       syscall\n"
  73         : "=r" (ret), "=r" (error)
  74         : "r" (clkid), "r" (ts), "r" (nr)
  75         : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
  76           "$14", "$15", "$24", "$25", "hi", "lo", "memory");
  77 +#endif
  78
  79         return error ? -ret : ret;
  80  }
  81 @@ -84,12 +102,21 @@ static __always_inline int clock_getres_fallback(
  82  #endif
  83         register long error asm("a3");
  84
  85 +#if MIPS_ISA_REV >= 6
  86 +       asm volatile(
  87 +       "       syscall\n"
  88 +       : "=r" (ret), "=r" (error)
  89 +       : "r" (clkid), "r" (ts), "r" (nr)
  90 +       : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
  91 +         "$14", "$15", "$24", "$25", "memory");
  92 +#else
  93         asm volatile(
  94         "       syscall\n"
  95         : "=r" (ret), "=r" (error)
  96         : "r" (clkid), "r" (ts), "r" (nr)
  97         : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
  98           "$14", "$15", "$24", "$25", "hi", "lo", "memory");
  99 +#endif
 100
 101         return error ? -ret : ret;
 102  }
 103 @@ -108,12 +135,21 @@ static __always_inline long clock_gettime32_fallback(
 104         register long nr asm("v0") = __NR_clock_gettime;
 105         register long error asm("a3");
 106
 107 +#if MIPS_ISA_REV >= 6
 108 +       asm volatile(
 109 +       "       syscall\n"
 110 +       : "=r" (ret), "=r" (error)
 111 +       : "r" (clkid), "r" (ts), "r" (nr)
 112 +       : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
 113 +         "$14", "$15", "$24", "$25", "memory");
 114 +#else
 115         asm volatile(
 116         "       syscall\n"
 117         : "=r" (ret), "=r" (error)
 118         : "r" (clkid), "r" (ts), "r" (nr)
 119         : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
 120           "$14", "$15", "$24", "$25", "hi", "lo", "memory");
 121 +#endif
 122
 123         return error ? -ret : ret;
 124  }
 125 @@ -128,12 +164,21 @@ static __always_inline int clock_getres32_fallback(
 126         register long nr asm("v0") = __NR_clock_getres;
 127         register long error asm("a3");
 128
 129 +#if MIPS_ISA_REV >= 6
 130 +       asm volatile(
 131 +       "       syscall\n"
 132 +       : "=r" (ret), "=r" (error)
 133 +       : "r" (clkid), "r" (ts), "r" (nr)
 134 +       : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
 135 +         "$14", "$15", "$24", "$25", "memory");
 136 +#else
 137         asm volatile(
 138         "       syscall\n"
 139         : "=r" (ret), "=r" (error)
 140         : "r" (clkid), "r" (ts), "r" (nr)
 141         : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
 142           "$14", "$15", "$24", "$25", "hi", "lo", "memory");
 143 +#endif
 144
 145         return error ? -ret : ret;
 146  }
 147 --
 148 2.25.4
 149