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 for libre-riscv-dev@lists.libre-riscv.org; Wed, 29 Apr 2020 09:59:41 +0100
From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Date: Wed, 29 Apr 2020 08:59:42 +0000
X-Bugzilla-Reason: CC
X-Bugzilla-Type: dep_changed
X-Bugzilla-Watch-Reason: None
X-Bugzilla-Product: Libre-SOC's first SoC
X-Bugzilla-Component: ALU (including IEEE754 16/32/64-bit FPU)
X-Bugzilla-Version: unspecified
X-Bugzilla-Keywords: 
X-Bugzilla-Severity: enhancement
X-Bugzilla-Who: lkcl@lkcl.net
X-Bugzilla-Status: CONFIRMED
X-Bugzilla-Resolution: 
X-Bugzilla-Priority: ---
X-Bugzilla-Assigned-To: lkcl@lkcl.net
X-Bugzilla-Flags: 
X-Bugzilla-Changed-Fields: bug_status resolution
Message-ID: <bug-132-13-rjPbJdYB54@https.bugs.libre-soc.org/>
In-Reply-To: <bug-132-13@https.bugs.libre-soc.org/>
References: <bug-132-13@https.bugs.libre-soc.org/>
X-Bugzilla-URL: https://bugs.libre-soc.org/
Auto-Submitted: auto-generated
MIME-Version: 1.0
Subject: [libre-riscv-dev] [Bug 132] SIMD-like nmigen signal for partitioning
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