Return-path: Envelope-to: publicinbox@libre-riscv.org Delivery-date: Fri, 08 May 2020 09:41:14 +0100 Received: from localhost ([::1] helo=libre-riscv.org) by libre-soc.org with esmtp (Exim 4.89) (envelope-from ) id 1jWyZE-0007jD-Tt; Fri, 08 May 2020 09:41:12 +0100 Received: from vps2.stafverhaegen.be ([85.10.201.15]) by libre-soc.org with esmtp (Exim 4.89) (envelope-from ) id 1jWyZD-0007j2-82 for libre-riscv-dev@lists.libre-riscv.org; Fri, 08 May 2020 09:41:11 +0100 Received: from hpdc7800 (hpdc7800 [10.0.0.1]) by vps2.stafverhaegen.be (Postfix) with ESMTP id A3CB111C05B7 for ; Fri, 8 May 2020 10:41:10 +0200 (CEST) Message-ID: From: Staf Verhaegen To: libre-riscv-dev@lists.libre-riscv.org Date: Fri, 08 May 2020 10:41:02 +0200 In-Reply-To: References: Organization: FibraServi bvba X-Mailer: Evolution 3.28.5 (3.28.5-8.el7) Mime-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.23 Subject: Re: [libre-riscv-dev] daily kan-ban 07may2020 update X-BeenThere: libre-riscv-dev@lists.libre-riscv.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Libre-RISCV General Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: Libre-RISCV General Development Content-Type: multipart/mixed; boundary="===============1013853600763958192==" Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org Sender: "libre-riscv-dev" --===============1013853600763958192== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-g9ssUMSDTY8J6l1JnbKl" --=-g9ssUMSDTY8J6l1JnbKl Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Luke Kenneth Casson Leighton schreef op vr 08-05-2020 om 03:26 [+0100]: > On Friday, May 8, 2020, Jacob Lifshay wrote: > > I attended the OpenPower virtual coffee meeting, there was an interesti= ngsuggestion to see if we could move to a later tapeout than october, toavo= id burnout due to deadline crunch. >=20 >=20 > i've written to Staf to see what is available. if you recall we have ana= greement to let him use the Oct2020 slot. so he is "2nd in queue". > there were other ideas to do a simpler processor for that slot. howevert= hese would likely go to the *back* of the queue (as a new request for thats= lot: "3rd in queue"). As a backup plan I had in mind to tape-out some other CPU like a SwerV RISC= -V core from Western Digital. Alternatively some of the budget could be use= d so I can look into multi-port RAMs and register files; maybe I can have a= closer look at a PLL also. These could first be tested on 0.35um which cos= ts a lot less (ca. $5000 vs. ca $20000). There is question about funding. It takes about 3 months after tape-out to = get the chips and then the debugging of the chip can only begin which typic= ally also takes a lot of time. So if we delay the tape-out the completion o= f the testing of the chip will miss the deadline for the current NLNet fund= ing. I am currently supposed to do the testing of the chip but I won't star= t that if I don't know if I can get the funding for it. 0.18um TSMC MPW runs are done at least once a month. You can find the sched= ule online: https://europractice-ic.com/wp-content/uploads/2020/05/General-= MPW-EUROPRACTICE-200505-v8.pdf So last two tape-out dates this year are 18/11 and 2/12 (I think 2/12 was n= ot there in a previous version of the file). greets, Staf. --=-g9ssUMSDTY8J6l1JnbKl-- --===============1013853600763958192== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGlicmUtcmlz Y3YtZGV2IG1haWxpbmcgbGlzdApsaWJyZS1yaXNjdi1kZXZAbGlzdHMubGlicmUtcmlzY3Yub3Jn Cmh0dHA6Ly9saXN0cy5saWJyZS1yaXNjdi5vcmcvbWFpbG1hbi9saXN0aW5mby9saWJyZS1yaXNj di1kZXYK --===============1013853600763958192==--