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Subject: Re: [libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture
 feasibility
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Immanuel, Yehowshua U schreef op zo 15-03-2020 om 19:52 [+0000]:
> >=20
> > Later (for Libre-SOC v2 or v3), it might be a good idea to add support =
for
> > x86 and x86_64 user-mode since the patents for the base ISA will have
> > expired by then. This would help give us an advantage since it would al=
low
> > us to run legacy software.
>=20
>=20
> Isn=E2=80=99t x86 kinda big - like a 1000+ instructions? How would this i=
mpact our power target=E2=80=A6
>=20
> But other than that, I=E2=80=99m all for adding x86 support.

If you consider implementing x86 instruction set you also need to
consider the risk of patent lawsuits being filed at you...

Risc-V instruction set is specially designed to only use features which
are not patented or for which the patents have expired. I did not dive
in the open licensing terms but I assume that includes patent licenses.

greets,
Staf.


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