-- Phony VHDL interface for SRAM block.

entity SPBlock_512W64B8W is
   port ( clk     : in  bit
        ; we      : in  bit_vector( 7 downto 0)
        ; a       : in  bit_vector( 8 downto 0)
        ; d       : in  bit_vector(63 downto 0)
        ; q       : out bit_vector(63 downto 0)
        ; vdd     : in  bit
        ; vss     : in  bit
        );
end SPBlock_512W64B8W;

architecture behavioral of SPBlock_512W64B8W is

begin

end behavioral;