LOGICAL_SYNTHESIS = Yosys
       PHYSICAL_SYNTHESIS = Coriolis
               DESIGN_KIT = sxlib

            YOSYS_SET_TOP = No
            USE_CLOCKTREE = No
                USE_DEBUG = No
                 USE_KITE = No
                VST_FLAGS = --vst-use-concat

                 NETLISTS = $(shell cat cells.lst)



 include ./mk/design-flow.mk


blif:      test_issuer.blif
vst:       test_issuer.vst

layout:    test_issuer_r.ap
gds:       test_issuer_r.gds

lvx:       lvx-test_issuer_r
druc:      druc-test_issuer_r
view:      cgt-test_issuer_r
viewn:     cgt-test_issuer