IA-64 Dependent Features
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Options
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-mconstant-gp
     This option instructs the assembler to mark the resulting object file as using the ``constant GP'' model.  With this model, it is assumed that the entire program uses a single global pointer (GP) value.  Note that this option does not in any fashion affect the machine code emitted by the assembler.  All it does is turn on the EF_IA_64_CONS_GP flag in the ELF file header.

-mauto-pic
     This option instructs the assembler to mark the resulting object file as using the ``constant GP without function descriptor'' data model. This model is like the ``constant GP'' model, except that it additionally does away with function descriptors.  What this means is that the address of a function refers directly to the function's code entry-point.  Normally, such an address would refer to a function descriptor, which contains both the code entry-point and the GP-value needed by the function.  Note that this option does not in any fashion affect the machine code emitted by the assembler.  All it does is turn on the EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header.

-milp32

-milp64

-mlp64

-mp64
     These options select the data model.  The assembler defaults to -mlp64 (LP64 data model).

-mle

-mbe
     These options select the byte order.  The -mle option selects little-endian byte order (default) and -mbe selects big-endian byte order.  Note that IA-64 machine code always uses little-endian byte order.

-munwind-check=warning

-munwind-check=error
     These options control what the assembler will do when performing consistency checks on unwind directives.  -munwind-check=warning will make the assembler issue a warning when an unwind directive check fails.  This is the default.  -munwind-check=error will make the assembler issue an error when an unwind directive check fails.

-x

-xexplicit
     These options turn on dependency violation checking.

-xauto
     This option instructs the assembler to automatically insert stop bits where necessary to remove dependency violations.  This is the default mode.

-xnone
     This option turns off dependency violation checking.

-xdebug
     This turns on debug output intended to help tracking down bugs in the dependency violation checker.

-xdebugn
     This is a shortcut for -xnone -xdebug.

-xdebugx
     This is a shortcut for -xexplicit -xdebug.

Syntax
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The assembler syntax closely follows the IA-64 Assembly Language Reference Guide.

Special Characters
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// is the line comment token.

; can be used instead of a newline to separate statements.

Register Names
--------------

The 128 integer registers are referred to as rN. The 128 floating-point registers are referred to as fN. The 128 application registers are referred to as arN. The 128 control registers are referred to as crN. The 64 one-bit predicate registers are referred to as pN. The 8 branch registers are referred to as bN. In addition, the assembler defines a number of aliases: gp (r1), sp (r12), rp (b0), ret0 (r8), ret1 (r9), ret2 (r10), ret3 (r9), fargN (f8+N), and fretN (f8+N).

For convenience, the assembler also defines aliases for all named application and control registers.  For example, ar.bsp refers to the register backing store pointer (ar17).  Similarly, cr.eoi refers to the end-of-interrupt register (cr67).

IA-64 Processor-Status-Register (PSR) Bit Names
-----------------------------------------------

The assembler defines bit masks for each of the bits in the IA-64 processor status register.  For example, psr.ic corresponds to a value of 0x2000.  These masks are primarily intended for use with the ssm/sum and rsm/rum instructions, but they can be used anywhere else where an integer constant is expected.

Opcodes
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For detailed information on the IA-64 machine instruction set, see the IA-64 Architecture Handbook (http://developer.intel.com/design/itanium/arch_spec.htm).