2020-01-08  Luo Xiong Hu  <luoxhu@linux.ibm.com>

	* ipa-inline.c (caller_growth_limits): Restore the AND.

2020-01-07  Andrew Stubbs  <ams@codesourcery.com>

	* config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
	(VEC_ALLREG_ALT): New iterator.
	(VEC_ALLREG_INT_MODE): New iterator.
	(VCMP_MODE): New iterator.
	(VCMP_MODE_INT): New iterator.
	(vec_cmpu<mode>di): Use VCMP_MODE_INT.
	(vec_cmp<u>v64qidi): New define_expand.
	(vec_cmp<mode>di_exec): Use VCMP_MODE.
	(vec_cmpu<mode>di_exec): New define_expand.
	(vec_cmp<u>v64qidi_exec): New define_expand.
	(vec_cmp<mode>di_dup): Use VCMP_MODE.
	(vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
	(vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
	(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
	(vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
	(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
	(vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
	(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
	(vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
	(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
	this.
	* config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
	* config/gcn/gcn.md (expander): Add sign_extend and zero_extend.

2020-01-07  Andrew Stubbs  <ams@codesourcery.com>

	* config/gcn/constraints.md (DA): Update description and match.
	(DB): Likewise.
	(Db): New constraint.
	* config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
	parameter.
	* config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
	Implement 'Db' mixed immediate type.
	* config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
	(addcv64si3_dup<exec_vcc>): Delete.
	(subcv64si3<exec_vcc>): Rework constraints.
	(addv64di3): Rework constraints.
	(addv64di3_exec): Rework constraints.
	(subv64di3): Rework constraints.
	(addv64di3_dup): Delete.
	(addv64di3_dup_exec): Delete.
	(addv64di3_zext): Rework constraints.
	(addv64di3_zext_exec): Rework constraints.
	(addv64di3_zext_dup): Rework constraints.
	(addv64di3_zext_dup_exec): Rework constraints.
	(addv64di3_zext_dup2): Rework constraints.
	(addv64di3_zext_dup2_exec): Rework constraints.
	(addv64di3_sext_dup2): Rework constraints.
	(addv64di3_sext_dup2_exec): Rework constraints.

2020-01-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
	existing target checks.

2020-01-07  Richard Biener  <rguenther@suse.de>

	* doc/install.texi: Bump minimal supported MPC version.

2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>

	* langhooks-def.h (lhd_simulate_enum_decl): Declare.
	(LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
	* langhooks.c: Include stor-layout.h.
	(lhd_simulate_enum_decl): New function.
	* config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
	handle_arm_sve_h for the LTO frontend.
	(register_vector_type): Cope with null returns from pushdecl.

2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
	(aarch64_sve::nvectors_if_data_type): Replace with...
	(aarch64_sve::builtin_type_p): ...this.
	* config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
	(find_vector_type): Delete.
	(add_sve_type_attribute): New function.
	(lookup_sve_type_attribute): Likewise.
	(register_builtin_types): Add an "SVE type" attribute to each type.
	(register_tuple_type): Likewise.
	(svbool_type_p, nvectors_if_data_type): Delete.
	(mangle_builtin_type): Use lookup_sve_type_attribute.
	(builtin_type_p): Likewise.  Add an overload that returns the
	number of constituent vector and predicate registers.
	* config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
	(aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
	instead of aarch64_sve_argument_p.
	(aarch64_takes_arguments_in_sve_regs_p): Likewise.
	(aarch64_pass_by_reference): Likewise.
	(aarch64_function_value_1): Likewise.
	(aarch64_return_in_memory): Likewise.
	(aarch64_layout_arg): Likewise.

2020-01-07  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/93156
	* tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
	least significant bit is always clear.

	PR tree-optimization/93118
	* match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?.  Add new
	simplifier with two intermediate conversions.

2020-01-07  Martin Liska  <mliska@suse.cz>

	* params.opt: Add Optimization for various parameters.

2020-01-07  Martin Liska  <mliska@suse.cz>

	PR ipa/83411
	* doc/extend.texi: Explain cloning for target_clone
	attribute.

2020-01-07  Martin Liska  <mliska@suse.cz>

	PR tree-optimization/92860
	* common.opt: Make in Optimization option
	as it is affected by -O0, which is an Optimization
	option.
	* tree-inline.c (tree_inlinable_function_p):
	Use opt_for_fn for warn_inline.
	(expand_call_inline): Likewise.

2020-01-07  Martin Liska  <mliska@suse.cz>

	PR tree-optimization/92860
	* common.opt: Make flag_ree as optimization
	attribute. 

2020-01-07  Martin Liska  <mliska@suse.cz>

	PR optimization/92860
	* params.opt: Mark param_min_crossjump_insns with Optimization
	keyword.

2020-01-07  Luo Xiong Hu  <luoxhu@linux.ibm.com>

	* ipa-inline-analysis.c (estimate_growth): Fix typo.
	* ipa-inline.c (caller_growth_limits): Use OR instead of AND.

2020-01-06  Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
	helper function to return the valid addressing formats for a given
	hard register and mode.
	(rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.

	* config/rs6000/constraints.md (Q constraint): Update
	documentation.
	* doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
	documentation.

	* config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
	Use 'Q' for doing vector extract from memory.
	(vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
	memory.
	(vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
	doing vector extract from memory.
	(vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
	extract from memory.

	* config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
	for the offset being 34-bits when -mcpu=future is used.

2020-01-06  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa.md: Revert change to use ordered_comparison_operator
	instead of cmpib_comparison_operator in cmpib patterns.
	* config/pa/predicates.md (cmpib_comparison_operator): Revert removal
	of cmpib_comparison_operator.  Revise comment.

2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>

	* tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
	in an IFN_DIV_POW2 node to be equal.

2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>

	* tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
	(vect_check_scalar_mask): ...this.
	(vectorizable_store, vectorizable_load): Update call accordingly.
	(vectorizable_call): Use vect_check_scalar_mask to check the mask
	argument in calls to conditional internal functions.

2020-01-06  Andrew Stubbs  <ams@codesourcery.com>

	* config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
	'0' matching inputs.
	(subv64di3_exec): Likewise.

2020-01-06  Bryan Stenson  <bryan@siliconvortex.com>

	* config/mips/mips.c (vr4130_align_insns): Fix typo.
	* doc/md.texi (movstr): Likewise.

2020-01-06  Andrew Stubbs  <ams@codesourcery.com>

	* config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
	clobber.

2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
	Depend on...
	(s-aarch64-tune-md): ...this new stamp file.  Pipe the new contents
	to a temporary file and use move-if-change to update the real
	file where necessary.

2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
	rather than Upa for CPY /M.

2020-01-06  Andrew Stubbs  <ams@codesourcery.com>

	* config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
	immediate.

2020-01-06  Martin Liska  <mliska@suse.cz>

    PR tree-optimization/92860
    * params.opt: Mark param_max_combine_insns with Optimization
    keyword. 

2020-01-05  Jakub Jelinek  <jakub@redhat.com>

	PR target/93141
	* config/i386/i386.md (SWIDWI): New mode iterator.
	(DWI, dwi): Add TImode variants.
	(addv<mode>4): Use SWIDWI iterator instead of SWI.  Use
	<general_hilo_operand> instead of <general_operand>.  Use
	CONST_SCALAR_INT_P instead of CONST_INT_P.
	(*addv<mode>4_1): Rename to ...
	(addv<mode>4_1): ... this.
	(QWI): New mode attribute.
	(*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
	define_insn_and_split patterns.
	(*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
	patterns.
	(uaddv<mode>4): Use SWIDWI iterator instead of SWI.  Use
	<general_hilo_operand> instead of <general_operand>.
	(*addcarry<mode>_1): New define_insn.
	(*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.

2020-01-03  Konstantin Kharlamov  <Hi-Angel@yandex.ru>

	* gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
	Use "call" instead of "set".

2020-01-03  Martin Jambor  <mjambor@suse.cz>

	PR ipa/92917
	* ipa-cp.c (print_all_lattices): Skip functions without info.

2020-01-03  Jakub Jelinek  <jakub@redhat.com>

	PR target/93089
	* config/i386/i386-options.c (ix86_simd_clone_adjust): If
	TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
	simd clones.  If TARGET_PREFER_AVX256, use prefer-vector-width=512
	for 'e' simd clones.

	PR target/93089
	* config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
	entry.
	(mprefer-vector-width=): Add Save.
	* config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
	-mprefer-vector-width= if non-zero.  Fix up -mfpmath= comment.
	(ix86_debug_options, ix86_function_specific_print): Adjust
	ix86_target_string callers.
	(ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
	(ix86_valid_target_attribute_tree): Likewise.
	* config/i386/i386-options.h (ix86_target_string): Add PVW argument.
	* config/i386/i386-expand.c (ix86_expand_builtin): Adjust
	ix86_target_string caller.

	PR target/93110
	* config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
	emitting ASHIFTRT, XOR and MINUS by hand.  Use gen_int_mode with QImode
	instead of gen_int_shift_amount + convert_modes.

	PR rtl-optimization/93088
	* loop-iv.c (find_single_def_src): Punt after looking through
	128 reg copies for regs with single definitions.  Move definitions
	to first uses.

2020-01-02  Dennis Zhang  <dennis.zhang@arm.com>

	* config/arm/arm-c.c (arm_cpu_builtins): Define
	__ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
	__ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
	__ARM_BF16_FORMAT_ALTERNATIVE when enabled.
	* config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
	* config/arm/arm-tables.opt: Regenerated.
	* config/arm/arm.c (arm_option_reconfigure_globals): Initialize
	arm_arch_i8mm and arm_arch_bf16 when enabled.
	* config/arm/arm.h (TARGET_I8MM): New macro.
	(TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
	* config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
	* config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
	* config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
	(v8_6_a_simd_variants): New.
	(v8_*_a_simd_variants): Add i8mm and bf16.
	* doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.

2020-01-02  Jakub Jelinek  <jakub@redhat.com>

	PR ipa/93087
	* predict.c (compute_function_frequency): Don't call
	warn_function_cold on functions that already have cold attribute.

2020-01-01  John David Anglin  <danglin@gcc.gnu.org>

	PR target/67834
	* config/pa/pa.c (pa_elf_select_rtx_section): New.  Put references to
	COMDAT group function labels in .data.rel.ro.local section.
	* config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.

	PR target/93111
	* config/pa/pa.md (scc): Use ordered_comparison_operator instead of
	comparison_operator in B and S integer comparisons.  Likewise, use
	ordered_comparison_operator instead of cmpib_comparison_operator in
	cmpib patterns.
	* config/pa/predicates.md (cmpib_comparison_operator): Remove.

2020-01-01  Jakub Jelinek  <jakub@redhat.com>

	Update copyright years.

	* gcc.c (process_command): Update copyright notice dates.
	* gcov-dump.c (print_version): Ditto.
	* gcov.c (print_version): Ditto.
	* gcov-tool.c (print_version): Ditto.
	* gengtype.c (create_file): Ditto.
	* doc/cpp.texi: Bump @copying's copyright year.
	* doc/cppinternals.texi: Ditto.
	* doc/gcc.texi: Ditto.
	* doc/gccint.texi: Ditto.
	* doc/gcov.texi: Ditto.
	* doc/install.texi: Ditto.
	* doc/invoke.texi: Ditto.

2020-01-01  Jan Hubicka  <hubicka@ucw.cz>

	* ipa.c (walk_polymorphic_call_targets): Fix updating of overall
	summary.

2020-01-01  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/93098
	* match.pd (popcount): For shift amounts, use integer_onep
	or wi::to_widest () == cst instead of tree_to_uhwi () == cst
	tests.  Make sure that precision is power of two larger than or equal
	to 16.  Ensure shift is never negative.  Use HOST_WIDE_INT_UC macro
	instead of ULL suffixed constants.  Formatting fixes.

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