#include "riscv_test.h" #include "sv_test_macros.h" RVTEST_RV64UF #define SV_ELWIDTH_TEST( vl, wid1, wid2, wid3, tdata, ans ) \ \ SV_FLW_DATA( f4, ( tdata + 0) , 0) ; \ SV_FLW_DATA( f5, ( tdata + 4), 0) ; \ SV_FLW_DATA( f6, ( tdata + 8), 0) ; \ SV_FLW_DATA( f7, ( tdata + 12), 0) ; \ \ SET_SV_MVL( vl ) ; \ SET_SV_3CSRS( SV_REG_CSR(0, 2, wid1, 2, 1), \ SV_REG_CSR(0, 4, wid2, 4, 1), \ SV_REG_CSR(0, 6, wid3, 6, 1) ) ; \ SET_SV_VL( vl ) ; \ \ fadd.s f2, f4, f6; \ \ CLR_SV_CSRS() ; \ SET_SV_VL(1) ; \ SET_SV_MVL(1) ; \ \ TEST_SV_FW(0, f2, ans+0, 0) ; \ TEST_SV_FW(0, f3, ans+4, 0) # SV test: vector-vector fadd # # sets up x3 and x4 with data, sets VL to 2, and carries out # an "add 1 to x3". which actually means "add 1 to x3 *AND* add 1 to x4" # Test code region. RVTEST_CODE_BEGIN # Start of test code. SV_ELWIDTH_TEST( 2, 2, 0, 0, testdata, answer ); SV_ELWIDTH_TEST( 2, 2, 2, 0, testdata2, answer2 ); RVTEST_PASS # Signal success. fail: RVTEST_FAIL RVTEST_CODE_END # End of test code. # Input data section. # This section is optional, and this data is NOT saved in the output. .data .align 3 testdata: .float 41.0 .float 42.0 .float 1.0 .float 2.0 .align 3 answer: .word 0x51805140 # 44 fp16 42 fp16, tested as-is, even if it goes to fp .word 0x0 # before going to int for comparison (TEST_SV_FW) .align 3 testdata2: .word 0x51405120 # 42 fp16 41 fp16 .word 0xffff5140 # 42 fp16 .float 1.0 .float 2.0 .align 3 answer2: .word 0x51805140 .word 0x0 # Output data section. RVTEST_DATA_BEGIN # Start of test output data region. .align 3 result: .dword -1 .dword -1 .dword -1 RVTEST_DATA_END # End of test output data region.