#Letter# #Every other layer is De-Morgan inverted to avoid needing inverters on AOI gates' outputs in order to get And-Or gates# #A[0]# #A[1]# #A[2]# #A[3]# #SH[1]# #SH[0]# #Y[0]# #Y[1]# #Y[2]# #Y[3]# ## ## ## ## ## #Imm[0-3]# #Imm[0-3]#