# RFC ls009 SVP64 REMAP instructions
**URLs**:
*
*
*
*
**Severity**: Major
**Status**: New
**Date**: 24 Mar 2023
**Target**: v3.2B
**Source**: v3.0B
**Books and Section affected**:
```
Book I, new Zero-Overhead-Loop Chapter.
Appendix E Power ISA sorted by opcode
Appendix F Power ISA sorted by version
Appendix G Power ISA sorted by Compliancy Subset
Appendix H Power ISA sorted by mnemonic
```
**Summary**
```
svremap - Re-Mapping of Register Element Offsets
svindex - General-purpose setting of SHAPEs to be re-mapped
svshape - Hardware-level setting of SHAPEs for element re-mapping
svshape2 - Hardware-level setting of SHAPEs for element re-mapping (v2)
```
**Submitter**: Luke Leighton (Libre-SOC)
**Requester**: Libre-SOC
**Impact on processor**:
```
Addition of four new "Zero-Overhead-Loop-Control" DSP-style Vector-style
Management Instructions which provide advanced features such as Matrix
FFT DCT Hardware-Assist Schedules and general-purpose Index reordering.
```
**Impact on software**:
```
Requires support for new instructions in assembler, debuggers,
and related tools.
```
**Keywords**:
```
Cray Supercomputing, Vectorisation, Zero-Overhead-Loop-Control (ZOLC),
Scalable Vectors, Multi-Issue Out-of-Order, Sequential Programming Model,
Digital Signal Processing (DSP)
```
**Motivation**
These REMAP Management instructions provide state-of-the-art advanced capabilities
to dramatically decrease instruction count and power reduction whilst retaining
unprecedented general-purpose capability and a standard Sequential Execution Model.
**Notes and Observations**:
1. TODO
**Changes**
Add the following entries to:
* the Appendices of Book I
* Instructions of Book I as a new Section
* TODO-Form of Book I Section 1.6.1.6 and 1.6.2
----------------
\newpage{}
# svstep: Vertical-First Stepping and status reporting
SVL-Form
* svstep RT,SVi,vf (Rc=0)
* svstep. RT,SVi,vf (Rc=1)
| 0-5|6-10|11.15|16..22| 23-25 | 26-30 |31| Form |
|----|----|-----|------|----------|-------|--|--------- |
|PO | RT | / | SVi | / / vf | XO |Rc| SVL-Form |
Pseudo-code:
```
if SVi[3:4] = 0b11 then
# store pack and unpack in SVSTATE
SVSTATE[53] <- SVi[5]
SVSTATE[54] <- SVi[6]
RT <- [0]*62 || SVSTATE[53:54]
else
# Vertical-First explicit stepping.
step <- SVSTATE_NEXT(SVi, vf)
RT <- [0]*57 || step
```
Special Registers Altered:
CR0 (if Rc=1)
**Description**
-------------
\newpage{}
-------------
\newpage{}
# Forms
Add the following to Book I, 1.6.1, SVI-Form
```
|0 |6 |11 |16 |21 |23 |24|25|26 31|
| PO | SVG|rmm | SVd |ew |SVyx|mm|sk| XO |
```
Add the following to Book I, 1.6.1, SVM-Form
```
|0 |6 |11 |16 |21 |25 |26 |31 |
| PO | SVxd | SVyd | SVzd | SVrm |vf | XO |
```
Add the following to Book I, 1.6.1, SVM2-Form
```
# 1.6.35.1 SVM2-FORM
|0 |6 |10 |11 |16 |21 |24|25 |26 |31 |
| PO | SVo |SVyx| rmm | SVd |XO |mm|sk | XO |
```
Add the following to Book I, 1.6.1, SVRM-Form
```
# 1.6.36 SVRM-FORM
|0 |6 |11 |13 |15 |17 |19 |21 |22 |26 |31 |
| PO | SVme |mi0 | mi1 | mi2 | mo0 | mo1 |pst |/// | XO |
```
* Add `SVI, SVM, SVM2, SVRM` to `XO (26:31)` Field in Book I, 1.6.2
Add the following to Book I, 1.6.2
```
mi0 (11:12)
Field used in REMAP to select the SVSHAPE for 1st input register
Formats: SVRM
mi1 (13:14)
Field used in REMAP to select the SVSHAPE for 2nd input register
Formats: SVRM
mi2 (15:16)
Field used in REMAP to select the SVSHAPE for 3rd input register
Formats: SVRM
mm (24)
Field used to specify the meaning of the rmm field for SVI-Form
and SVM2-Form
Formats: SVI, SVM2
mo0 (17:18)
Field used in REMAP to select the SVSHAPE for 1st output register
Formats: SVRM
mo1 (19:20)
Field used in REMAP to select the SVSHAPE for 2nd output register
Formats: SVRM
pst (21)
Field used in REMAP to indicate "persistence" mode (REMAP
continues to apply to multiple instructions)
Formats: SVRM
rmm (11:15)
REMAP Mode field for SVI-Form and SVM2-Form
Formats: SVI, SVM2
sk (25)
Field used to specify dimensional skipping in svindex
Formats: SVI, SVM2
SVd (16:20)
Immediate field used to specify the size of the REMAP dimension
in the svindex and svshape2 instructions
Formats: SVI, SVM2
SVDS (16:29)
Immediate field used to specify a 9-bit signed
two's complement integer which is concatenated
on the right with 0b00 and sign-extended to 64 bits.
Formats: SVDS
SVG (6:10)
Field used to specify a GPR to be used as a
source for indexing.
Formats: SVI
SVi (16:22)
Simple-V immediate field for setting VL or MVL
Formats: SVL
SVme (6:10)
Simple-V "REMAP" map-enable bits (0-4)
Formats: SVRM
SVo (6:9)
Field used by the svshape2 instruction as an offset
Formats: SVM2
SVrm (21:24)
Simple-V "REMAP" Mode
Formats: SVM
SVxd (6:10)
Simple-V "REMAP" x-dimension size
Formats: SVM
SVyd (11:15)
Simple-V "REMAP" y-dimension size
Formats: SVM
SVzd (16:20)
Simple-V "REMAP" z-dimension size
Formats: SVM
```
# Appendices
Appendix E Power ISA sorted by opcode
Appendix F Power ISA sorted by version
Appendix G Power ISA sorted by Compliancy Subset
Appendix H Power ISA sorted by mnemonic
| Form | Book | Page | Version | mnemonic | Description |
|------|------|------|---------|----------|-------------|
| SVRM | I | # | 3.0B | svremap | REMAP enabling instruction |
[[!tag opf_rfc]]