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[libreriscv.git] / 180nm_Oct2020.mdwn

diff --git a/180nm_Oct2020.mdwn b/180nm_Oct2020.mdwn
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--- a/180nm_Oct2020.mdwn
+++ b/180nm_Oct2020.mdwn
@@ -3,6 +3,11 @@
 This page is for discussion of what we can aim for and reasonably achieve.
 To be expanded with links to bugreports
 
 This page is for discussion of what we can aim for and reasonably achieve.
 To be expanded with links to bugreports
 

+Links:
+
+* <https://gitlab.com/Chips4Makers>
+* <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/007699.html>
+

 ## Minimum viability
 
 * a Wishbone interface.  this allows us to drop *directly* into
 ## Minimum viability
 
 * a Wishbone interface.  this allows us to drop *directly* into


@@ -23,6 +28,7 @@ To be expanded with links to bugreports
 * [[180nm_Oct2020/interfaces]] we need as a bare minimum include JTAG,
   GPIO, EINT, SPI and QSPI, I2C, UART16550, LPC (from Raptor Engineering)
   and that actually might even be it.
 * [[180nm_Oct2020/interfaces]] we need as a bare minimum include JTAG,
   GPIO, EINT, SPI and QSPI, I2C, UART16550, LPC (from Raptor Engineering)
   and that actually might even be it.

+* [[180nm_Oct2020/ls180]] actual auto-generated pinouts by pinmux program

 
 ## Secondary priorities
 
 
 ## Secondary priorities
 


@@ -52,7 +58,28 @@ To be expanded with links to bugreports
 * [[programmerjake]] TODO
 * [[Yehowshua_Immanuel]] - Delegate interfaces and do timeline/cost projections
 * [[mnolan]] pipelines 
 * [[programmerjake]] TODO
 * [[Yehowshua_Immanuel]] - Delegate interfaces and do timeline/cost projections
 * [[mnolan]] pipelines 

-* [[tplaten]] TODO
+* [[tplaten]] memory and cache

 * [[jock_tanner]] TODO
 * MarketNext TODO
 
 * [[jock_tanner]] TODO
 * MarketNext TODO
 

+# Preliminary coriolis2 ASIC layout
+
+## 02jul2020 - first version
+
+* <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-July/008438.html>
+
+[[!img 180nm_Oct2020/2020-07-02_19-01.png size="900x" ]]
+
+## 03jul2020 - DIV unit added
+
+[[!img 180nm_Oct2020/2020-07-03_11-04.png size="900x" ]]
+
+## 28dec2020 - End of year progress update
+
+### With blockage layers
+
+[[!img 180nm_Oct2020/2020-12-28.png size="900x" ]]
+
+### Without blockage layers so wires can be seen more clearly
+
+[[!img 180nm_Oct2020/2020-12-28_without_blockages.png size="900x" ]]