+ # Disks
+ disk0 = CowIdeDisk(driveID='master')
+ disk2 = CowIdeDisk(driveID='master')
+ disk0.childImage(mdesc.disk())
+ disk2.childImage(disk('linux-bigswap2.img'))
+ self.pc.south_bridge.ide.disks = [disk0, disk2]
+
+ # Add in a Bios information structure.
+ structures = [X86SMBiosBiosInformation()]
+ self.smbios_table.structures = structures
+
+ # Set up the Intel MP table
+ base_entries = []
+ ext_entries = []
+ for i in xrange(numCPUs):
+ bp = X86IntelMPProcessor(
+ local_apic_id = i,
+ local_apic_version = 0x14,
+ enable = True,
+ bootstrap = (i == 0))
+ base_entries.append(bp)
+ io_apic = X86IntelMPIOAPIC(
+ id = numCPUs,
+ version = 0x11,
+ enable = True,
+ address = 0xfec00000)
+ self.pc.south_bridge.io_apic.apic_id = io_apic.id
+ base_entries.append(io_apic)
+ isa_bus = X86IntelMPBus(bus_id = 0, bus_type='ISA')
+ base_entries.append(isa_bus)
+ pci_bus = X86IntelMPBus(bus_id = 1, bus_type='PCI')
+ base_entries.append(pci_bus)
+ connect_busses = X86IntelMPBusHierarchy(bus_id=0,
+ subtractive_decode=True, parent_bus=1)
+ ext_entries.append(connect_busses)
+ pci_dev4_inta = X86IntelMPIOIntAssignment(
+ interrupt_type = 'INT',
+ polarity = 'ConformPolarity',
+ trigger = 'ConformTrigger',
+ source_bus_id = 1,
+ source_bus_irq = 0 + (4 << 2),
+ dest_io_apic_id = io_apic.id,
+ dest_io_apic_intin = 16)
+ base_entries.append(pci_dev4_inta)
+ def assignISAInt(irq, apicPin):
+ assign_8259_to_apic = X86IntelMPIOIntAssignment(
+ interrupt_type = 'ExtInt',
+ polarity = 'ConformPolarity',
+ trigger = 'ConformTrigger',
+ source_bus_id = 0,
+ source_bus_irq = irq,
+ dest_io_apic_id = io_apic.id,
+ dest_io_apic_intin = 0)
+ base_entries.append(assign_8259_to_apic)
+ assign_to_apic = X86IntelMPIOIntAssignment(
+ interrupt_type = 'INT',
+ polarity = 'ConformPolarity',
+ trigger = 'ConformTrigger',
+ source_bus_id = 0,
+ source_bus_irq = irq,
+ dest_io_apic_id = io_apic.id,
+ dest_io_apic_intin = apicPin)
+ base_entries.append(assign_to_apic)
+ assignISAInt(0, 2)
+ assignISAInt(1, 1)
+ for i in range(3, 15):
+ assignISAInt(i, i)
+ self.intel_mp_table.base_entries = base_entries
+ self.intel_mp_table.ext_entries = ext_entries
+
+def setWorkCountOptions(system, options):
+ if options.work_item_id != None:
+ system.work_item_id = options.work_item_id
+ if options.work_begin_cpu_id_exit != None:
+ system.work_begin_cpu_id_exit = options.work_begin_cpu_id_exit
+ if options.work_end_exit_count != None:
+ system.work_end_exit_count = options.work_end_exit_count
+ if options.work_end_checkpoint_count != None:
+ system.work_end_ckpt_count = options.work_end_checkpoint_count
+ if options.work_begin_exit_count != None:
+ system.work_begin_exit_count = options.work_begin_exit_count
+ if options.work_begin_checkpoint_count != None:
+ system.work_begin_ckpt_count = options.work_begin_checkpoint_count
+ if options.work_cpus_checkpoint_count != None:
+ system.work_cpus_ckpt_count = options.work_cpus_checkpoint_count
+
+
+def makeLinuxX86System(mem_mode, numCPUs = 1, mdesc = None, Ruby = False):
+ self = LinuxX86System()
+
+ # Build up the x86 system and then specialize it for Linux
+ makeX86System(mem_mode, numCPUs, mdesc, self, Ruby)
+
+ # We assume below that there's at least 1MB of memory. We'll require 2
+ # just to avoid corner cases.
+ assert(self.physmem.range.second.getValue() >= 0x200000)
+
+ self.e820_table.entries = \
+ [
+ # Mark the first megabyte of memory as reserved
+ X86E820Entry(addr = 0, size = '1MB', range_type = 2),
+ # Mark the rest as available
+ X86E820Entry(addr = 0x100000,
+ size = '%dB' % (self.physmem.range.second - 0x100000 + 1),
+ range_type = 1)
+ ]
+
+ # Command line
+ self.boot_osflags = 'earlyprintk=ttyS0 console=ttyS0 lpj=7999923 ' + \
+ 'root=/dev/hda1'