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Macros are nasty, so let's get rid of them. Convert all
[gem5.git]
/
dev
/
ide_ctrl.cc
diff --git
a/dev/ide_ctrl.cc
b/dev/ide_ctrl.cc
index dbec6d7433c0bf8380c929001cf1641e7e17b60e..aa0217745281ba41e7c29d13ad30f222060f9ac1 100644
(file)
--- a/
dev/ide_ctrl.cc
+++ b/
dev/ide_ctrl.cc
@@
-34,16
+34,16
@@
#include "base/trace.hh"
#include "cpu/intr_control.hh"
#include "dev/dma.hh"
#include "base/trace.hh"
#include "cpu/intr_control.hh"
#include "dev/dma.hh"
-#include "dev/pcireg.h"
-#include "dev/pciconfigall.hh"
-#include "dev/ide_disk.hh"
#include "dev/ide_ctrl.hh"
#include "dev/ide_ctrl.hh"
+#include "dev/ide_disk.hh"
+#include "dev/pciconfigall.hh"
+#include "dev/pcireg.h"
+#include "dev/platform.hh"
#include "dev/tsunami_cchip.hh"
#include "mem/bus/bus.hh"
#include "dev/tsunami_cchip.hh"
#include "mem/bus/bus.hh"
+#include "mem/bus/dma_interface.hh"
#include "mem/bus/pio_interface.hh"
#include "mem/bus/pio_interface_impl.hh"
#include "mem/bus/pio_interface.hh"
#include "mem/bus/pio_interface_impl.hh"
-#include "mem/bus/dma_interface.hh"
-#include "dev/tsunami.hh"
#include "mem/functional_mem/memory_control.hh"
#include "mem/functional_mem/physical_memory.hh"
#include "sim/builder.hh"
#include "mem/functional_mem/memory_control.hh"
#include "mem/functional_mem/physical_memory.hh"
#include "sim/builder.hh"
@@
-63,9
+63,6
@@
IdeController::IdeController(const string &name, IntrControl *ic,
Bus *host_bus, Tick pio_latency, HierParams *hier)
: PciDev(name, mmu, cf, cd, bus_num, dev_num, func_num), tsunami(t)
{
Bus *host_bus, Tick pio_latency, HierParams *hier)
: PciDev(name, mmu, cf, cd, bus_num, dev_num, func_num), tsunami(t)
{
- // put back pointer into Tsunami
- tsunami->disk_controller = this;
-
// initialize the PIO interface addresses
pri_cmd_addr = 0;
pri_cmd_size = BARSize[0];
// initialize the PIO interface addresses
pri_cmd_addr = 0;
pri_cmd_size = BARSize[0];
@@
-245,13
+242,13
@@
IdeController::setDmaComplete(IdeDisk *disk)
void
IdeController::intrPost()
{
void
IdeController::intrPost()
{
- tsunami->
cchip->postDRIR
(configData->config.hdr.pci0.interruptLine);
+ tsunami->
postPciInt
(configData->config.hdr.pci0.interruptLine);
}
void
IdeController::intrClear()
{
}
void
IdeController::intrClear()
{
- tsunami->c
chip->clearDRIR
(configData->config.hdr.pci0.interruptLine);
+ tsunami->c
learPciInt
(configData->config.hdr.pci0.interruptLine);
}
////
}
////
@@
-380,7
+377,7
@@
IdeController::WriteConfig(int offset, int size, uint32_t data)
pioInterface->addAddrRange(RangeSize(pri_cmd_addr,
pri_cmd_size));
pioInterface->addAddrRange(RangeSize(pri_cmd_addr,
pri_cmd_size));
- pri_cmd_addr &=
PA_UNCACHED_MASK
;
+ pri_cmd_addr &=
EV5::PAddrUncachedMask
;
}
break;
}
break;
@@
-391,7
+388,7
@@
IdeController::WriteConfig(int offset, int size, uint32_t data)
pioInterface->addAddrRange(RangeSize(pri_ctrl_addr,
pri_ctrl_size));
pioInterface->addAddrRange(RangeSize(pri_ctrl_addr,
pri_ctrl_size));
- pri_ctrl_addr &=
PA_UNCACHED_MASK
;
+ pri_ctrl_addr &=
EV5::PAddrUncachedMask
;
}
break;
}
break;
@@
-402,7
+399,7
@@
IdeController::WriteConfig(int offset, int size, uint32_t data)
pioInterface->addAddrRange(RangeSize(sec_cmd_addr,
sec_cmd_size));
pioInterface->addAddrRange(RangeSize(sec_cmd_addr,
sec_cmd_size));
- sec_cmd_addr &=
PA_UNCACHED_MASK
;
+ sec_cmd_addr &=
EV5::PAddrUncachedMask
;
}
break;
}
break;
@@
-413,7
+410,7
@@
IdeController::WriteConfig(int offset, int size, uint32_t data)
pioInterface->addAddrRange(RangeSize(sec_ctrl_addr,
sec_ctrl_size));
pioInterface->addAddrRange(RangeSize(sec_ctrl_addr,
sec_ctrl_size));
- sec_ctrl_addr &=
PA_UNCACHED_MASK
;
+ sec_ctrl_addr &=
EV5::PAddrUncachedMask
;
}
break;
}
break;
@@
-423,7
+420,7
@@
IdeController::WriteConfig(int offset, int size, uint32_t data)
if (pioInterface)
pioInterface->addAddrRange(RangeSize(bmi_addr, bmi_size));
if (pioInterface)
pioInterface->addAddrRange(RangeSize(bmi_addr, bmi_size));
- bmi_addr &=
PA_UNCACHED_MASK
;
+ bmi_addr &=
EV5::PAddrUncachedMask
;
}
break;
}
}
break;
}