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better debugging of DMA operations
[gem5.git]
/
dev
/
pciconfigall.cc
diff --git
a/dev/pciconfigall.cc
b/dev/pciconfigall.cc
index 65bee19ad0068c87ab4ea199aa285f2bcd41cf9d..740a9b4acd7685070107806ed27c877d82f461d4 100644
(file)
--- a/
dev/pciconfigall.cc
+++ b/
dev/pciconfigall.cc
@@
-35,22
+35,30
@@
#include <vector>
#include "base/trace.hh"
#include <vector>
#include "base/trace.hh"
-#include "cpu/exec_context.hh"
-#include "dev/scsi_ctrl.hh"
#include "dev/pciconfigall.hh"
#include "dev/pcidev.hh"
#include "dev/pciconfigall.hh"
#include "dev/pcidev.hh"
+#include "mem/bus/bus.hh"
+#include "mem/bus/pio_interface.hh"
+#include "mem/bus/pio_interface_impl.hh"
#include "mem/functional_mem/memory_control.hh"
#include "sim/builder.hh"
#include "sim/system.hh"
using namespace std;
#include "mem/functional_mem/memory_control.hh"
#include "sim/builder.hh"
#include "sim/system.hh"
using namespace std;
-PciConfigAll::PciConfigAll(const string &name, Addr a,
-
MemoryController *mmu
)
- :
FunctionalMemory
(name), addr(a)
+PciConfigAll::PciConfigAll(const string &name, Addr a,
MemoryController *mmu,
+
HierParams *hier, Bus *bus, Tick pio_latency
)
+ :
PioDevice
(name), addr(a)
{
mmu->add_child(this, Range<Addr>(addr, addr + size));
{
mmu->add_child(this, Range<Addr>(addr, addr + size));
+ if (bus) {
+ pioInterface = newPioInterface(name, hier, bus, this,
+ &PciConfigAll::cacheAccess);
+ pioInterface->addAddrRange(addr, addr + size - 1);
+ pioLatency = pio_latency * bus->clockRatio;
+ }
+
// Make all the pointers to devices null
for(int x=0; x < MAX_PCI_DEV; x++)
for(int y=0; y < MAX_PCI_FUNC; y++)
// Make all the pointers to devices null
for(int x=0; x < MAX_PCI_DEV; x++)
for(int y=0; y < MAX_PCI_FUNC; y++)
@@
-165,6
+173,12
@@
PciConfigAll::unserialize(Checkpoint *cp, const std::string §ion)
*/
}
*/
}
+Tick
+PciConfigAll::cacheAccess(MemReqPtr &req)
+{
+ return curTick + pioLatency;
+}
+
#ifndef DOXYGEN_SHOULD_SKIP_THIS
BEGIN_DECLARE_SIM_OBJECT_PARAMS(PciConfigAll)
#ifndef DOXYGEN_SHOULD_SKIP_THIS
BEGIN_DECLARE_SIM_OBJECT_PARAMS(PciConfigAll)
@@
-172,6
+186,9
@@
BEGIN_DECLARE_SIM_OBJECT_PARAMS(PciConfigAll)
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
Param<Addr> mask;
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
Param<Addr> mask;
+ SimObjectParam<Bus*> io_bus;
+ Param<Tick> pio_latency;
+ SimObjectParam<HierParams *> hier;
END_DECLARE_SIM_OBJECT_PARAMS(PciConfigAll)
END_DECLARE_SIM_OBJECT_PARAMS(PciConfigAll)
@@
-179,13
+196,17
@@
BEGIN_INIT_SIM_OBJECT_PARAMS(PciConfigAll)
INIT_PARAM(mmu, "Memory Controller"),
INIT_PARAM(addr, "Device Address"),
INIT_PARAM(mmu, "Memory Controller"),
INIT_PARAM(addr, "Device Address"),
- INIT_PARAM(mask, "Address Mask")
+ INIT_PARAM(mask, "Address Mask"),
+ INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL),
+ INIT_PARAM_DFLT(pio_latency, "Programmed IO latency in bus cycles", 1),
+ INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams)
END_INIT_SIM_OBJECT_PARAMS(PciConfigAll)
CREATE_SIM_OBJECT(PciConfigAll)
{
END_INIT_SIM_OBJECT_PARAMS(PciConfigAll)
CREATE_SIM_OBJECT(PciConfigAll)
{
- return new PciConfigAll(getInstanceName(), addr, mmu);
+ return new PciConfigAll(getInstanceName(), addr, mmu, hier, io_bus,
+ pio_latency);
}
REGISTER_SIM_OBJECT("PciConfigAll", PciConfigAll)
}
REGISTER_SIM_OBJECT("PciConfigAll", PciConfigAll)