+inline Fault
+PciDev::readBar(MemReqPtr &req, uint8_t *data)
+{
+ if (isBAR(req->paddr, 0))
+ return readBar0(req, req->paddr - BARAddrs[0], data);
+ if (isBAR(req->paddr, 1))
+ return readBar1(req, req->paddr - BARAddrs[1], data);
+ if (isBAR(req->paddr, 2))
+ return readBar2(req, req->paddr - BARAddrs[2], data);
+ if (isBAR(req->paddr, 3))
+ return readBar3(req, req->paddr - BARAddrs[3], data);
+ if (isBAR(req->paddr, 4))
+ return readBar4(req, req->paddr - BARAddrs[4], data);
+ if (isBAR(req->paddr, 5))
+ return readBar5(req, req->paddr - BARAddrs[5], data);
+ return Machine_Check_Fault;
+}
+
+inline Fault
+PciDev::writeBar(MemReqPtr &req, const uint8_t *data)
+{
+ if (isBAR(req->paddr, 0))
+ return writeBar0(req, req->paddr - BARAddrs[0], data);
+ if (isBAR(req->paddr, 1))
+ return writeBar1(req, req->paddr - BARAddrs[1], data);
+ if (isBAR(req->paddr, 2))
+ return writeBar2(req, req->paddr - BARAddrs[2], data);
+ if (isBAR(req->paddr, 3))
+ return writeBar3(req, req->paddr - BARAddrs[3], data);
+ if (isBAR(req->paddr, 4))
+ return writeBar4(req, req->paddr - BARAddrs[4], data);
+ if (isBAR(req->paddr, 5))
+ return writeBar5(req, req->paddr - BARAddrs[5], data);
+ return Machine_Check_Fault;
+}
+