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Support NNPC and branch instructions ... Outputs to decoder.cc correctly
[gem5.git]
/
dev
/
tsunami_pchip.hh
diff --git
a/dev/tsunami_pchip.hh
b/dev/tsunami_pchip.hh
index 44f145a606b88e2854191cf7c1052771e54d76c8..ff888bea1eb4bcfae94d3adc3277f5098d07f33b 100644
(file)
--- a/
dev/tsunami_pchip.hh
+++ b/
dev/tsunami_pchip.hh
@@
-1,5
+1,5
@@
/*
/*
- * Copyright (c) 200
3
The Regents of The University of Michigan
+ * Copyright (c) 200
4-2005
The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@
-26,20
+26,23
@@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-/* @file
- * Tsunami PC
hip
+/*
*
@file
+ * Tsunami PC
I interface CSRs
*/
#ifndef __TSUNAMI_PCHIP_HH__
#define __TSUNAMI_PCHIP_HH__
*/
#ifndef __TSUNAMI_PCHIP_HH__
#define __TSUNAMI_PCHIP_HH__
-#include "mem/functional_mem/functional_memory.hh"
#include "dev/tsunami.hh"
#include "dev/tsunami.hh"
+#include "base/range.hh"
+#include "dev/io_device.hh"
-/*
- * Tsunami PChip
+class MemoryController;
+
+/**
+ * A very simple implementation of the Tsunami PCI interface chips.
*/
*/
-class TsunamiPChip : public
FunctionalMemory
+class TsunamiPChip : public
PioDevice
{
private:
/** The base address of this device */
{
private:
/** The base address of this device */
@@
-56,6
+59,9
@@
class TsunamiPChip : public FunctionalMemory
*/
Tsunami *tsunami;
*/
Tsunami *tsunami;
+ /** Pchip control register */
+ uint64_t pctl;
+
/** Window Base addresses */
uint64_t wsba[4];
/** Window Base addresses */
uint64_t wsba[4];
@@
-72,9
+78,12
@@
class TsunamiPChip : public FunctionalMemory
* @param t a pointer to the tsunami device
* @param a the address which we respond to
* @param mmu the mmu we are to register with
* @param t a pointer to the tsunami device
* @param a the address which we respond to
* @param mmu the mmu we are to register with
+ * @param hier object to store parameters universal the device hierarchy
+ * @param bus The bus that this device is attached to
*/
TsunamiPChip(const std::string &name, Tsunami *t, Addr a,
*/
TsunamiPChip(const std::string &name, Tsunami *t, Addr a,
- MemoryController *mmu);
+ MemoryController *mmu, HierParams *hier, Bus *pio_bus,
+ Tick pio_latency);
/**
* Translate a PCI bus address to a memory address for DMA.
/**
* Translate a PCI bus address to a memory address for DMA.
@@
-90,7
+99,7
@@
class TsunamiPChip : public FunctionalMemory
* @param data A pointer to write the read data to.
* @return The fault condition of the access.
*/
* @param data A pointer to write the read data to.
* @return The fault condition of the access.
*/
- virtual Fault read(MemReqPtr &req, uint8_t *data);
+ virtual Fault
*
read(MemReqPtr &req, uint8_t *data);
/**
* Process a write to the PChip.
/**
* Process a write to the PChip.
@@
-98,7
+107,7
@@
class TsunamiPChip : public FunctionalMemory
* @param data The data to write.
* @return The fault condition of the access.
*/
* @param data The data to write.
* @return The fault condition of the access.
*/
- virtual Fault write(MemReqPtr &req, const uint8_t *data);
+ virtual Fault
*
write(MemReqPtr &req, const uint8_t *data);
/**
* Serialize this object to the given output stream.
/**
* Serialize this object to the given output stream.
@@
-112,6
+121,13
@@
class TsunamiPChip : public FunctionalMemory
* @param section The section name of this object
*/
virtual void unserialize(Checkpoint *cp, const std::string §ion);
* @param section The section name of this object
*/
virtual void unserialize(Checkpoint *cp, const std::string §ion);
+
+ /**
+ * Return how long this access will take.
+ * @param req the memory request to calcuate
+ * @return Tick when the request is done
+ */
+ Tick cacheAccess(MemReqPtr &req);
};
#endif // __TSUNAMI_PCHIP_HH__
};
#endif // __TSUNAMI_PCHIP_HH__