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[libreriscv.git] / docs.mdwn

diff --git a/docs.mdwn b/docs.mdwn
index e076a6ba1edb59b33af9899610382d1044f04e66..18056542cac3ce42d96d8f435fe651e212b4c282 100644 (file)
--- a/docs.mdwn
+++ b/docs.mdwn
@@ -3,7 +3,7 @@
 A draft version of the specification is available at
 <https://ftp.libre-soc.org/power-spec-draft.pdf>
 
 A draft version of the specification is available at
 <https://ftp.libre-soc.org/power-spec-draft.pdf>
 

-## Codebase Structure
+# Codebase Structure

 
 The SOC is partitioned into four repositories. The subrepositories are
 intended as general purpose standalone projects useful outside of LibreSOC. For example,
 
 The SOC is partitioned into four repositories. The subrepositories are
 intended as general purpose standalone projects useful outside of LibreSOC. For example,


@@ -17,10 +17,7 @@ construction of FSMs and arbitrary length pipelines.
 | [nmutil](https://git.libre-soc.org/?p=nmutil.git;a=tree) | [nmutil](https://docs.libre-soc.org/nmutil/) | Equivalent to Chisel3.util | [libresoc-nmutil](https://pypi.org/project/libresoc-nmutil) |
 | [OpenPOWER ISA](https://git.libre-soc.org/?p=nmutil.git;a=tree) | [OpenPOWER ISA](https://docs.libre-soc.org/openpower-isa/) | Simulator, ISA spec compiler, co-simulation infrastructure |  [libresoc-openpower-isa](https://pypi.org/project/libresoc-openpower-isa/)  |
 
 | [nmutil](https://git.libre-soc.org/?p=nmutil.git;a=tree) | [nmutil](https://docs.libre-soc.org/nmutil/) | Equivalent to Chisel3.util | [libresoc-nmutil](https://pypi.org/project/libresoc-nmutil) |
 | [OpenPOWER ISA](https://git.libre-soc.org/?p=nmutil.git;a=tree) | [OpenPOWER ISA](https://docs.libre-soc.org/openpower-isa/) | Simulator, ISA spec compiler, co-simulation infrastructure |  [libresoc-openpower-isa](https://pypi.org/project/libresoc-openpower-isa/)  |
 

-
-Also see [[SOC Architecture|3d_gpu/architecture]]
-
-## Installing the Codebase
+# Installing the Codebase

 
 Installation is much easier when using the
 [install scripts](https://git.libre-soc.org/?p=dev-env-setup.git;a=blob;f=hdl-dev-repos;hb=HEAD).
 
 Installation is much easier when using the
 [install scripts](https://git.libre-soc.org/?p=dev-env-setup.git;a=blob;f=hdl-dev-repos;hb=HEAD).


@@ -37,31 +34,29 @@ For a simple set of commands to follow, see [[HDL_workflow/devscripts]]. If
 you prefer to do a manual install and explicitly install dependencies
 yourself, in order to verify them, see [[HDL_workflow]]
 
 you prefer to do a manual install and explicitly install dependencies
 yourself, in order to verify them, see [[HDL_workflow]]
 

-## Gtkwave Tutorial
-
-[[docs/gtkwave_tutorial]]
-
-## Formal proof notes
-
-[[docs/notes_on_formal_proofs]]
-
-## Learning nmigen
-
-[[docs/learning_nmigen]]
+# Tutorials and documentation

 
 

-## Test API
+* [[SOC Architecture|3d_gpu/architecture]]
+* Gtkwave Tutorial [[docs/gtkwave_tutorial]]
+* Formal proof notes [[docs/notes_on_formal_proofs]]
+* Learning nmigen [[docs/learning_nmigen]]
+* Test API [[docs/testapi]]
+* Pinmux and JTAG Boundary Scan [[docs/pinmux]]
+* pypowersim python-based command-line simulator [[docs/pypowersim]]
+* First steps [[docs/firststeps]]
+* Adding an instruction [[docs/adding_instr]] - see also below

 
 

-[[docs/testapi]]
+# SVP64

 
 

-## Pinmux and JTAG Boundary Scan
-
-[[docs/pinmux]]
-
-## pypowersim python-based command-line simulator
+Currently in Draft form, [[openpower/sv/svp64]] is the basis of the
+Supercomputing Cray-style Vectorisation of the Power ISA.

 
 

-[[docs/pypowersim]]
+# Checklist for adding an instruction

 
 

-## SVP64
+TODO.  use the commit diffs for these instructions as a guide

 
 

-Currently in Draft form, [[openpower/sv/svp64]] is the basis of the
-Supercomputing Cray-style Vectorisation of the Power ISA.
+* fmvis <https://bugs.libre-soc.org/show_bug.cgi?id=887>
+* avgadd etc. <https://bugs.libre-soc.org/show_bug.cgi?id=863>
+* int min/max <https://bugs.libre-soc.org/show_bug.cgi?id=234#c1>
+* ternlogi <https://bugs.libre-soc.org/show_bug.cgi?id=745> which included
+  adding a hardware implementation as well