{
/* Number of bytes stored to the stack by call instructions.
2 bytes for avr1-5 and avrxmega1-5, 3 bytes for avr6 and avrxmega6-7. */
{
/* Number of bytes stored to the stack by call instructions.
2 bytes for avr1-5 and avrxmega1-5, 3 bytes for avr6 and avrxmega6-7. */
- else if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
- || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD)
+ else if (TYPE_TARGET_TYPE (type)->code () == TYPE_CODE_FUNC
+ || TYPE_TARGET_TYPE (type)->code () == TYPE_CODE_METHOD)
{
/* A code pointer is word (16 bits) addressed. We shift the address down
by 1 bit to convert it to a pointer. */
{
/* A code pointer is word (16 bits) addressed. We shift the address down
by 1 bit to convert it to a pointer. */
- else if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
- || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD
+ else if (TYPE_TARGET_TYPE (type)->code () == TYPE_CODE_FUNC
+ || TYPE_TARGET_TYPE (type)->code () == TYPE_CODE_METHOD
|| TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type)))
{
/* A code pointer is word (16 bits) addressed so we shift it up
|| TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type)))
{
/* A code pointer is word (16 bits) addressed so we shift it up
avr_write_pc (struct regcache *regcache, CORE_ADDR val)
{
regcache_cooked_write_unsigned (regcache, AVR_PC_REGNUM,
avr_write_pc (struct regcache *regcache, CORE_ADDR val)
{
regcache_cooked_write_unsigned (regcache, AVR_PC_REGNUM,
}
static enum register_status
avr_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
}
static enum register_status
avr_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
This information is stored in the avr_unwind_cache structure.
Some devices lack the sbiw instruction, so on those replace this:
This information is stored in the avr_unwind_cache structure.
Some devices lack the sbiw instruction, so on those replace this:
- push rXX ; saved regs
- ...
- push r28
- push r29
- in r28,__SP_L__
- in r29,__SP_H__
- sbiw r28,<LOCALS_SIZE>
- in __tmp_reg__,__SREG__
- cli
- out __SP_H__,r29
- out __SREG__,__tmp_reg__
- out __SP_L__,r28
+ push rXX ; saved regs
+ ...
+ push r28
+ push r29
+ in r28,__SP_L__
+ in r29,__SP_H__
+ sbiw r28,<LOCALS_SIZE>
+ in __tmp_reg__,__SREG__
+ cli
+ out __SP_H__,r29
+ out __SREG__,__tmp_reg__
+ out __SP_L__,r28
- ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
- ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
- out __SP_H__,r29
- out __SP_L__,r28
+ ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>)
+ ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>)
+ out __SP_H__,r29
+ out __SP_L__,r28
- push __zero_reg__
- push __tmp_reg__
- in __tmp_reg__, __SREG__
- push __tmp_reg__
- clr __zero_reg__
- push rXX ; save registers r18:r27, r30:r31
- ...
- push r28 ; save frame pointer
- push r29
- in r28, __SP_L__
- in r29, __SP_H__
- sbiw r28, <LOCALS_SIZE>
- out __SP_H__, r29
- out __SP_L__, r28
-
+ push __zero_reg__
+ push __tmp_reg__
+ in __tmp_reg__, __SREG__
+ push __tmp_reg__
+ clr __zero_reg__
+ push rXX ; save registers r18:r27, r30:r31
+ ...
+ push r28 ; save frame pointer
+ push r29
+ in r28, __SP_L__
+ in r29, __SP_H__
+ sbiw r28, <LOCALS_SIZE>
+ out __SP_H__, r29
+ out __SP_L__, r28
+
- sei
- push __zero_reg__
- push __tmp_reg__
- in __tmp_reg__, __SREG__
- push __tmp_reg__
- clr __zero_reg__
- push rXX ; save registers r18:r27, r30:r31
- ...
- push r28 ; save frame pointer
- push r29
- in r28, __SP_L__
- in r29, __SP_H__
- sbiw r28, <LOCALS_SIZE>
- cli
- out __SP_H__, r29
- sei
- out __SP_L__, r28
+ sei
+ push __zero_reg__
+ push __tmp_reg__
+ in __tmp_reg__, __SREG__
+ push __tmp_reg__
+ clr __zero_reg__
+ push rXX ; save registers r18:r27, r30:r31
+ ...
+ push r28 ; save frame pointer
+ push r29
+ in r28, __SP_L__
+ in r29, __SP_H__
+ sbiw r28, <LOCALS_SIZE>
+ cli
+ out __SP_H__, r29
+ sei
+ out __SP_L__, r28
A `-mcall-prologues' prologue looks like this (Note that the megas use a
jmp instead of a rjmp, thus the prologue is one word larger since jmp is a
32 bit insn and rjmp is a 16 bit insn):
A `-mcall-prologues' prologue looks like this (Note that the megas use a
jmp instead of a rjmp, thus the prologue is one word larger since jmp is a
32 bit insn and rjmp is a 16 bit insn):
- ldi r26,lo8(<LOCALS_SIZE>)
- ldi r27,hi8(<LOCALS_SIZE>)
- ldi r30,pm_lo8(.L_foo_body)
- ldi r31,pm_hi8(.L_foo_body)
- rjmp __prologue_saves__+RRR
- .L_foo_body: */
+ ldi r26,lo8(<LOCALS_SIZE>)
+ ldi r27,hi8(<LOCALS_SIZE>)
+ ldi r30,pm_lo8(.L_foo_body)
+ ldi r31,pm_hi8(.L_foo_body)
+ rjmp __prologue_saves__+RRR
+ .L_foo_body: */
/* Not really part of a prologue, but still need to scan for it, is when a
function prologue moves values passed via registers as arguments to new
registers. In this case, all local variables live in registers, so there
may be some register saves. This is what it looks like:
/* Not really part of a prologue, but still need to scan for it, is when a
function prologue moves values passed via registers as arguments to new
registers. In this case, all local variables live in registers, so there
may be some register saves. This is what it looks like:
There could be multiple movw's. If the target doesn't have a movw insn, it
will use two mov insns. This could be done after any of the above prologue
There could be multiple movw's. If the target doesn't have a movw insn, it
will use two mov insns. This could be done after any of the above prologue
if (vpc + 4 + sizeof (img) < len
&& memcmp (prologue + vpc + 4, img, sizeof (img)) == 0)
{
if (vpc + 4 + sizeof (img) < len
&& memcmp (prologue + vpc + 4, img, sizeof (img)) == 0)
{
insn = extract_unsigned_integer (&prologue[vpc + 8], 2, byte_order);
/* rjmp __prologue_saves__+RRR */
if ((insn & 0xf000) == 0xc000)
insn = extract_unsigned_integer (&prologue[vpc + 8], 2, byte_order);
/* rjmp __prologue_saves__+RRR */
if ((insn & 0xf000) == 0xc000)
- {
- /* Extract PC relative offset from RJMP */
- i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0);
- /* Convert offset to byte addressable mode */
- i *= 2;
- /* Destination address */
- i += pc_beg + 10;
-
- if (body_addr != (pc_beg + 10)/2)
- break;
-
- pc_offset += 2;
- }
+ {
+ /* Extract PC relative offset from RJMP */
+ i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0);
+ /* Convert offset to byte addressable mode */
+ i *= 2;
+ /* Destination address */
+ i += pc_beg + 10;
+
+ if (body_addr != (pc_beg + 10)/2)
+ break;
+
+ pc_offset += 2;
+ }
- Which is a pushes count in `-mcall-prologues' mode */
- num_pushes = AVR_MAX_PUSHES - (i - BMSYMBOL_VALUE_ADDRESS (msymbol)) / 2;
+ Which is a pushes count in `-mcall-prologues' mode */
+ num_pushes = AVR_MAX_PUSHES - (i - msymbol.value_address ()) / 2;
- info->saved_regs[AVR_SREG_REGNUM].addr = 3;
- info->saved_regs[0].addr = 2;
- info->saved_regs[1].addr = 1;
- info->size += 3;
+ info->saved_regs[AVR_SREG_REGNUM].set_addr (3);
+ info->saved_regs[0].set_addr (2);
+ info->saved_regs[1].set_addr (1);
+ info->size += 3;
}
else if (len >= sizeof (img) - 2
&& memcmp (img + 2, prologue, sizeof (img) - 2) == 0)
{
}
else if (len >= sizeof (img) - 2
&& memcmp (img + 2, prologue, sizeof (img) - 2) == 0)
{
- info->prologue_type = AVR_PROLOGUE_SIG;
- vpc += sizeof (img) - 2;
- info->saved_regs[AVR_SREG_REGNUM].addr = 3;
- info->saved_regs[0].addr = 2;
- info->saved_regs[1].addr = 1;
- info->size += 2;
+ info->prologue_type = AVR_PROLOGUE_SIG;
+ vpc += sizeof (img) - 2;
+ info->saved_regs[AVR_SREG_REGNUM].set_addr (3);
+ info->saved_regs[0].set_addr (2);
+ info->saved_regs[1].set_addr (1);
+ info->size += 2;
gdb_assert (vpc < AVR_MAX_PROLOGUE_SIZE);
/* Handle static small stack allocation using rcall or push. */
gdb_assert (vpc < AVR_MAX_PROLOGUE_SIZE);
/* Handle static small stack allocation using rcall or push. */
while (scan_stage == 1 && vpc < len)
{
insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
if (insn == 0xd000) /* rcall .+0 */
while (scan_stage == 1 && vpc < len)
{
insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
if (insn == 0xd000) /* rcall .+0 */
/* Third stage of the prologue scanning. (Really two stages).
Scan for:
sbiw r28,XX or subi r28,lo8(XX)
/* Third stage of the prologue scanning. (Really two stages).
Scan for:
sbiw r28,XX or subi r28,lo8(XX)
insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */
insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */
else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */
{
locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4);
else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */
{
locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4);
- or signal handler functions, which is why we set the prologue type
- when we saw the beginning of the prologue previously. */
+ or signal handler functions, which is why we set the prologue type
+ when we saw the beginning of the prologue previously. */
if (vpc + sizeof (img_sig) < len
&& memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0)
if (vpc + sizeof (img_sig) < len
&& memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0)
else if (vpc + sizeof (img_int) < len
&& memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0)
else if (vpc + sizeof (img_int) < len
&& memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0)
if (vpc + sizeof (img) < len
&& memcmp (prologue + vpc, img, sizeof (img)) == 0)
if (vpc + sizeof (img) < len
&& memcmp (prologue + vpc, img, sizeof (img)) == 0)
{
insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */
{
insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */
- if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
- || TYPE_CODE (valtype) == TYPE_CODE_UNION
- || TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
+ if ((valtype->code () == TYPE_CODE_STRUCT
+ || valtype->code () == TYPE_CODE_UNION
+ || valtype->code () == TYPE_CODE_ARRAY)
static struct avr_unwind_cache *
avr_frame_unwind_cache (struct frame_info *this_frame,
static struct avr_unwind_cache *
avr_frame_unwind_cache (struct frame_info *this_frame,
{
CORE_ADDR start_pc, current_pc;
ULONGEST prev_sp;
ULONGEST this_base;
struct avr_unwind_cache *info;
struct gdbarch *gdbarch;
{
CORE_ADDR start_pc, current_pc;
ULONGEST prev_sp;
ULONGEST this_base;
struct avr_unwind_cache *info;
struct gdbarch *gdbarch;
ULONGEST high_base; /* High byte of FP */
/* The SP was moved to the FP. This indicates that a new frame
ULONGEST high_base; /* High byte of FP */
/* The SP was moved to the FP. This indicates that a new frame
this_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM);
high_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM + 1);
this_base += (high_base << 8);
/* The FP points at the last saved register. Adjust the FP back
this_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM);
high_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM + 1);
this_base += (high_base << 8);
/* The FP points at the last saved register. Adjust the FP back
this_base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM);
prev_sp = this_base + info->size;
}
this_base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM);
prev_sp = this_base + info->size;
}
/* Adjust all the saved registers so that they contain addresses and not
offsets. */
for (i = 0; i < gdbarch_num_regs (gdbarch) - 1; i++)
/* Adjust all the saved registers so that they contain addresses and not
offsets. */
for (i = 0; i < gdbarch_num_regs (gdbarch) - 1; i++)
- if (info->saved_regs[i].addr > 0)
- info->saved_regs[i].addr = info->prev_sp - info->saved_regs[i].addr;
+ if (info->saved_regs[i].is_addr ())
+ info->saved_regs[i].set_addr (info->prev_sp
+ - info->saved_regs[i].addr ());
/* Except for the main and startup code, the return PC is always saved on
the stack and is at the base of the frame. */
if (info->prologue_type != AVR_PROLOGUE_MAIN)
/* Except for the main and startup code, the return PC is always saved on
the stack and is at the base of the frame. */
if (info->prologue_type != AVR_PROLOGUE_MAIN)
- tdep = gdbarch_tdep (gdbarch);
- trad_frame_set_value (info->saved_regs, AVR_SP_REGNUM,
- info->prev_sp - 1 + tdep->call_length);
+ avr_gdbarch_tdep *tdep = gdbarch_tdep<avr_gdbarch_tdep> (gdbarch);
+ info->saved_regs[AVR_SP_REGNUM].set_value (info->prev_sp
+ - 1 + tdep->call_length);
- void **this_prologue_cache,
- struct frame_id *this_id)
+ void **this_prologue_cache,
+ struct frame_id *this_id)
{
struct avr_unwind_cache *info
= avr_frame_unwind_cache (this_frame, this_prologue_cache);
{
struct avr_unwind_cache *info
= avr_frame_unwind_cache (this_frame, this_prologue_cache);
/* Reading the return PC from the PC register is slightly
abnormal. register_size(AVR_PC_REGNUM) says it is 4 bytes,
but in reality, only two bytes (3 in upcoming mega256) are
/* Reading the return PC from the PC register is slightly
abnormal. register_size(AVR_PC_REGNUM) says it is 4 bytes,
but in reality, only two bytes (3 in upcoming mega256) are
- read_memory (info->saved_regs[AVR_PC_REGNUM].addr,
- buf, tdep->call_length);
+ read_memory (info->saved_regs[AVR_PC_REGNUM].addr (),
+ buf, tdep->call_length);
/* When arguments must be pushed onto the stack, they go on in reverse
order. The below implements a FILO (stack) to do this. */
/* When arguments must be pushed onto the stack, they go on in reverse
order. The below implements a FILO (stack) to do this. */
-static struct stack_item *
-push_stack_item (struct stack_item *prev, const bfd_byte *contents, int len)
+static struct avr_stack_item *
+push_stack_item (struct avr_stack_item *prev, const bfd_byte *contents,
+ int len)
-static struct stack_item *pop_stack_item (struct stack_item *si);
-static struct stack_item *
-pop_stack_item (struct stack_item *si)
+static struct avr_stack_item *
+pop_stack_item (struct avr_stack_item *si)
- struct regcache *regcache, CORE_ADDR bp_addr,
- int nargs, struct value **args, CORE_ADDR sp,
+ struct regcache *regcache, CORE_ADDR bp_addr,
+ int nargs, struct value **args, CORE_ADDR sp,
- E.g. For length 2, registers regnum and regnum-1 (say 25 and 24)
- shall be used. So, last needed register will be regnum-1(24). */
+ E.g. For length 2, registers regnum and regnum-1 (say 25 and 24)
+ shall be used. So, last needed register will be regnum-1(24). */
last_regnum = regnum - (len + (len & 1)) + 1;
/* If there are registers available, use them. Once we start putting
last_regnum = regnum - (len + (len & 1)) + 1;
/* If there are registers available, use them. Once we start putting
- {
- /* Skip a register for odd length args. */
- if (len & 1)
- regnum--;
-
- /* Write MSB of argument into register and subsequent bytes in
- decreasing register numbers. */
- for (j = 0; j < len; j++)
- regcache_cooked_write_unsigned
- (regcache, regnum--, contents[len - j - 1]);
- }
+ {
+ /* Skip a register for odd length args. */
+ if (len & 1)
+ regnum--;
+
+ /* Write MSB of argument into register and subsequent bytes in
+ decreasing register numbers. */
+ for (j = 0; j < len; j++)
+ regcache_cooked_write_unsigned
+ (regcache, regnum--, contents[len - j - 1]);
+ }
- {
- /* From here on, we don't care about regnum. */
- si = push_stack_item (si, contents, len);
- }
+ {
+ /* From here on, we don't care about regnum. */
+ si = push_stack_item (si, contents, len);
+ }
avr_address_class_type_flags (int byte_size, int dwarf2_addr_class)
{
/* The value 1 of the DW_AT_address_class attribute corresponds to the
avr_address_class_type_flags (int byte_size, int dwarf2_addr_class)
{
/* The value 1 of the DW_AT_address_class attribute corresponds to the
{
if (strcmp (name, "flash") == 0)
{
*type_flags_ptr = AVR_TYPE_INSTANCE_FLAG_ADDRESS_CLASS_FLASH;
{
if (strcmp (name, "flash") == 0)
{
*type_flags_ptr = AVR_TYPE_INSTANCE_FLAG_ADDRESS_CLASS_FLASH;
return best_arch->gdbarch;
}
/* None found, create a new architecture from the information provided. */
return best_arch->gdbarch;
}
/* None found, create a new architecture from the information provided. */
gdbarch = gdbarch_alloc (&info, tdep);
tdep->call_length = call_length;
gdbarch = gdbarch_alloc (&info, tdep);
tdep->call_length = call_length;
- = target_read_alloc (current_top_target (), TARGET_OBJECT_AVR, "avr.io_reg");
+ = target_read_alloc (current_inferior ()->top_target (),
+ TARGET_OBJECT_AVR, "avr.io_reg");
- fprintf_unfiltered (gdb_stderr,
- _("ERR: info io_registers NOT supported "
- "by current target\n"));
+ gdb_printf (gdb_stderr,
+ _("ERR: info io_registers NOT supported "
+ "by current target\n"));
- fprintf_unfiltered (gdb_stderr,
- _("Error fetching number of io registers\n"));
+ gdb_printf (gdb_stderr,
+ _("Error fetching number of io registers\n"));
snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j);
snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j);
- buf = target_read_alloc (current_top_target (), TARGET_OBJECT_AVR, query);
+ buf = target_read_alloc (current_inferior ()->top_target (),
+ TARGET_OBJECT_AVR, query);
- {
- fprintf_unfiltered (gdb_stderr,
- _("ERR: error reading avr.io_reg:%x,%x\n"),
- i, j);
- return;
- }
+ {
+ gdb_printf (gdb_stderr,
+ _("ERR: error reading avr.io_reg:%x,%x\n"),
+ i, j);
+ return;
+ }
const char *p = (const char *) buf->data ();
for (int k = i; k < (i + j); k++)
{
if (sscanf (p, "%[^,],%x;", query, &val) == 2)
{
const char *p = (const char *) buf->data ();
for (int k = i; k < (i + j); k++)
{
if (sscanf (p, "%[^,],%x;", query, &val) == 2)
{
- printf_filtered ("[%02x] %-15s : %02x\n", k, query, val);
+ gdb_printf ("[%02x] %-15s : %02x\n", k, query, val);