#include "ia64-libunwind-tdep.h"
/* Note: KERNEL_START is supposed to be an address which is not going
#include "ia64-libunwind-tdep.h"
/* Note: KERNEL_START is supposed to be an address which is not going
- to ever contain any valid unwind info. For ia64 linux, the choice
- of 0xc000000000000000 is fairly safe since that's uncached space.
+ to ever contain any valid unwind info. For ia64 linux, the choice
+ of 0xc000000000000000 is fairly safe since that's uncached space.
- We use KERNEL_START as follows: after obtaining the kernel's
- unwind table via getunwind(), we project its unwind data into
- address-range KERNEL_START-(KERNEL_START+ktab_size) and then
- when ia64_access_mem() sees a memory access to this
- address-range, we redirect it to ktab instead.
+ We use KERNEL_START as follows: after obtaining the kernel's
+ unwind table via getunwind(), we project its unwind data into
+ address-range KERNEL_START-(KERNEL_START+ktab_size) and then
+ when ia64_access_mem() sees a memory access to this
+ address-range, we redirect it to ktab instead.
- None of this hackery is needed with a modern kernel/libcs
- which uses the kernel virtual DSO to provide access to the
- kernel's unwind info. In that case, ktab_size remains 0 and
- hence the value of KERNEL_START doesn't matter. */
+ None of this hackery is needed with a modern kernel/libcs
+ which uses the kernel virtual DSO to provide access to the
+ kernel's unwind info. In that case, ktab_size remains 0 and
+ hence the value of KERNEL_START doesn't matter. */
/* NOTE: we treat the register stack registers r32-r127 as
pseudo-registers because they may not be accessible via the ptrace
/* NOTE: we treat the register stack registers r32-r127 as
pseudo-registers because they may not be accessible via the ptrace
{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
- vector_p = TYPE_VECTOR (register_type (gdbarch, regnum));
- float_p = TYPE_CODE (register_type (gdbarch, regnum)) == TYPE_CODE_FLT;
+ vector_p = register_type (gdbarch, regnum)->is_vector ();
+ float_p = register_type (gdbarch, regnum)->code () == TYPE_CODE_FLT;
- template = extract_bit_field (bundle, 0, 5);
- *it = template_encoding_table[(int)template][slotnum];
+ templ = extract_bit_field (bundle, 0, 5);
+ *it = template_encoding_table[(int)templ][slotnum];
The current addressing used by the code below:
original PC placed_address placed_size required covered
The current addressing used by the code below:
original PC placed_address placed_size required covered
0xABCDE0 0xABCDE0 0x10 <0x0...0x5> <0x0..0xF>
0xABCDE1 0xABCDE1 0xF <0x5...0xA> <0x1..0xF>
0xABCDE2 0xABCDE2 0xE <0xA...0xF> <0x2..0xF>
0xABCDE0 0xABCDE0 0x10 <0x0...0x5> <0x0..0xF>
0xABCDE1 0xABCDE1 0xF <0x5...0xA> <0x1..0xF>
0xABCDE2 0xABCDE2 0xE <0xA...0xF> <0x2..0xF>
ia64_memory_insert_breakpoint (struct gdbarch *gdbarch,
struct bp_target_info *bp_tgt)
{
ia64_memory_insert_breakpoint (struct gdbarch *gdbarch,
struct bp_target_info *bp_tgt)
{
gdb_byte bundle[BUNDLE_LEN];
int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER, shadow_slotnum;
long long instr_breakpoint;
int val;
gdb_byte bundle[BUNDLE_LEN];
int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER, shadow_slotnum;
long long instr_breakpoint;
int val;
Otherwise, we could possibly store into the shadow parts of the adjacent
placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
breakpoint instruction bits region. */
Otherwise, we could possibly store into the shadow parts of the adjacent
placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
breakpoint instruction bits region. */
/* SHADOW_SLOTNUM saves the original slot number as expected by the caller
for addressing the SHADOW_CONTENTS placement. */
/* SHADOW_SLOTNUM saves the original slot number as expected by the caller
for addressing the SHADOW_CONTENTS placement. */
- template = extract_bit_field (bundle, 0, 5);
- if (template_encoding_table[template][slotnum] == X)
+ templ = extract_bit_field (bundle, 0, 5);
+ if (template_encoding_table[templ][slotnum] == X)
{
/* X unit types can only be used in slot 2, and are actually
part of a 2-slot L-X instruction. We cannot break at this
{
/* X unit types can only be used in slot 2, and are actually
part of a 2-slot L-X instruction. We cannot break at this
{
/* L unit types can only be used in slot 1. But the associated
opcode for that instruction is in slot 2, so bump the slot number
{
/* L unit types can only be used in slot 1. But the associated
opcode for that instruction is in slot 2, so bump the slot number
restoration mechanism kicks in and we would possibly remove parts of the
adjacent placed breakpoints. It is due to our SHADOW_CONTENTS overlapping
the real breakpoint instruction bits region. */
restoration mechanism kicks in and we would possibly remove parts of the
adjacent placed breakpoints. It is due to our SHADOW_CONTENTS overlapping
the real breakpoint instruction bits region. */
reinserted by bp_loc_is_permanent. Multiple breakpoints at the same
location cannot induce the internal error as they are optimized into
a single instance by update_global_location_list. */
reinserted by bp_loc_is_permanent. Multiple breakpoints at the same
location cannot induce the internal error as they are optimized into
a single instance by update_global_location_list. */
paddress (gdbarch, bp_tgt->placed_address));
replace_slotN_contents (bundle, IA64_BREAKPOINT, slotnum);
paddress (gdbarch, bp_tgt->placed_address));
replace_slotN_contents (bundle, IA64_BREAKPOINT, slotnum);
int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER, shadow_slotnum;
long long instr_breakpoint, instr_saved;
int val;
int slotnum = (addr & 0x0f) / SLOT_MULTIPLIER, shadow_slotnum;
long long instr_breakpoint, instr_saved;
int val;
mechanism kicks in and we would possibly remove parts of the adjacent
placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
breakpoint instruction bits region. */
mechanism kicks in and we would possibly remove parts of the adjacent
placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
breakpoint instruction bits region. */
/* SHADOW_SLOTNUM saves the original slot number as expected by the caller
for addressing the SHADOW_CONTENTS placement. */
shadow_slotnum = slotnum;
/* SHADOW_SLOTNUM saves the original slot number as expected by the caller
for addressing the SHADOW_CONTENTS placement. */
shadow_slotnum = slotnum;
- template = extract_bit_field (bundle_mem, 0, 5);
- if (template_encoding_table[template][slotnum] == X)
+ templ = extract_bit_field (bundle_mem, 0, 5);
+ if (template_encoding_table[templ][slotnum] == X)
{
/* X unit types can only be used in slot 2, and are actually
part of a 2-slot L-X instruction. We refuse to insert
{
/* X unit types can only be used in slot 2, and are actually
part of a 2-slot L-X instruction. We refuse to insert
warning (_("Cannot remove breakpoint at address %s from non-existing "
"X-type slot, memory has changed underneath"),
paddress (gdbarch, bp_tgt->placed_address));
warning (_("Cannot remove breakpoint at address %s from non-existing "
"X-type slot, memory has changed underneath"),
paddress (gdbarch, bp_tgt->placed_address));
{
/* L unit types can only be used in slot 1. But the breakpoint
was actually saved using slot 2, so update the slot number
{
/* L unit types can only be used in slot 1. But the breakpoint
was actually saved using slot 2, so update the slot number
instr_breakpoint = slotN_contents (bundle_mem, slotnum);
if (instr_breakpoint != IA64_BREAKPOINT)
instr_breakpoint = slotN_contents (bundle_mem, slotnum);
if (instr_breakpoint != IA64_BREAKPOINT)
warning (_("Cannot remove breakpoint at address %s, "
"no break instruction at such address."),
paddress (gdbarch, bp_tgt->placed_address));
warning (_("Cannot remove breakpoint at address %s, "
"no break instruction at such address."),
paddress (gdbarch, bp_tgt->placed_address));
replace_slotN_contents (bundle_mem, instr_saved, slotnum);
val = target_write_raw_memory (addr, bundle_mem, BUNDLE_LEN);
replace_slotN_contents (bundle_mem, instr_saved, slotnum);
val = target_write_raw_memory (addr, bundle_mem, BUNDLE_LEN);
/* As gdbarch_breakpoint_from_pc ranges have byte granularity and ia64
instruction slots ranges are bit-granular (41 bits) we have to provide an
extended range as described for ia64_memory_insert_breakpoint. We also take
/* As gdbarch_breakpoint_from_pc ranges have byte granularity and ia64
instruction slots ranges are bit-granular (41 bits) we have to provide an
extended range as described for ia64_memory_insert_breakpoint. We also take
/* Enable the automatic memory restoration from breakpoints while
we read our instruction bundle to match bp_loc_is_permanent. */
/* Enable the automatic memory restoration from breakpoints while
we read our instruction bundle to match bp_loc_is_permanent. */
- cleanup = make_show_memory_breakpoints_cleanup (0);
- val = target_read_memory (addr, bundle, BUNDLE_LEN);
- do_cleanups (cleanup);
+ {
+ scoped_restore restore_memory_0
+ = make_scoped_restore_show_memory_breakpoints (0);
+ val = target_read_memory (addr, bundle, BUNDLE_LEN);
+ }
/* The memory might be unreachable. This can happen, for instance,
when the user inserts a breakpoint at an invalid address. */
/* The memory might be unreachable. This can happen, for instance,
when the user inserts a breakpoint at an invalid address. */
- template = extract_bit_field (bundle, 0, 5);
- if (template_encoding_table[template][slotnum] == X)
+ templ = extract_bit_field (bundle, 0, 5);
+ if (template_encoding_table[templ][slotnum] == X)
- regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr_value);
- regcache_cooked_read_unsigned (regcache, IA64_IP_REGNUM, &pc_value);
+ regcache->cooked_read (IA64_PSR_REGNUM, &psr_value);
+ regcache->cooked_read (IA64_IP_REGNUM, &pc_value);
-ia64_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
- int regnum, gdb_byte *buf)
+ia64_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
+ int regnum, gdb_byte *buf)
found sequentially in memory starting at $bof. This
isn't always true, but without libunwind, this is the
best we can do. */
found sequentially in memory starting at $bof. This
isn't always true, but without libunwind, this is the
best we can do. */
- status = regcache_cooked_read_unsigned (regcache,
- IA64_BSP_REGNUM, &bsp);
+ status = regcache->cooked_read (IA64_BSP_REGNUM, &bsp);
- status = regcache_cooked_read_unsigned (regcache,
- IA64_CFM_REGNUM, &cfm);
+ status = regcache->cooked_read (IA64_CFM_REGNUM, &cfm);
int nat_bit;
/* If our nat collection address is bigger than bsp, we have to get
the nat collection from rnat. Otherwise, we fetch the nat
collection from the computed address. */
if (nat_addr >= bsp)
int nat_bit;
/* If our nat collection address is bigger than bsp, we have to get
the nat collection from rnat. Otherwise, we fetch the nat
collection from the computed address. */
if (nat_addr >= bsp)
else
nat_collection = read_memory_integer (nat_addr, 8, byte_order);
nat_bit = (gr_addr >> 3) & 0x3f;
else
nat_collection = read_memory_integer (nat_addr, 8, byte_order);
nat_bit = (gr_addr >> 3) & 0x3f;
}
prN_val = (pr & (1LL << (regnum - VP0_REGNUM))) != 0;
store_unsigned_integer (buf, register_size (gdbarch, regnum),
}
prN_val = (pr & (1LL << (regnum - VP0_REGNUM))) != 0;
store_unsigned_integer (buf, register_size (gdbarch, regnum),
if ((cfm & 0x7f) > regnum - V32_REGNUM)
{
ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
if ((cfm & 0x7f) > regnum - V32_REGNUM)
{
ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM));
}
prN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum),
byte_order);
}
prN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum),
byte_order);
ia64_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type)
{
return (regno >= IA64_FR0_REGNUM && regno <= IA64_FR127_REGNUM
ia64_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type)
{
return (regno >= IA64_FR0_REGNUM && regno <= IA64_FR127_REGNUM
int *optimizedp, int *unavailablep)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
int *optimizedp, int *unavailablep)
{
struct gdbarch *gdbarch = get_frame_arch (frame);
/* Convert to TYPE. */
if (!get_frame_register_bytes (frame, regnum, 0,
/* Convert to TYPE. */
if (!get_frame_register_bytes (frame, regnum, 0,
- register_size (gdbarch, regnum),
- in, optimizedp, unavailablep))
+ gdb::make_array_view (in,
+ register_size (gdbarch,
+ regnum)),
+ optimizedp, unavailablep))
- convert_typed_floating (in, ia64_ext_type (gdbarch), out, valtype);
+ target_float_convert (in, ia64_ext_type (gdbarch), out, valtype);
*optimizedp = *unavailablep = 0;
return 1;
}
static void
ia64_value_to_register (struct frame_info *frame, int regnum,
*optimizedp = *unavailablep = 0;
return 1;
}
static void
ia64_value_to_register (struct frame_info *frame, int regnum,
- gdb_byte out[MAX_REGISTER_SIZE];
- convert_typed_floating (in, valtype, out, ia64_ext_type (gdbarch));
+ gdb_byte out[IA64_FP_REGISTER_SIZE];
+ target_float_convert (in, valtype, out, ia64_ext_type (gdbarch));
in the function looking for address ranges whose corresponding
line number is less than or equal to the first one that we
found for the function. (It can be less than when the
scheduler puts a body instruction before the first prologue
instruction.) */
for (i = 2 * max_skip_non_prologue_insns;
in the function looking for address ranges whose corresponding
line number is less than or equal to the first one that we
found for the function. (It can be less than when the
scheduler puts a body instruction before the first prologue
instruction.) */
for (i = 2 * max_skip_non_prologue_insns;
struct symtab_and_line sal;
sal = find_pc_line (addr, 0);
struct symtab_and_line sal;
sal = find_pc_line (addr, 0);
- struct frame_info *this_frame,
- struct ia64_frame_cache *cache)
+ struct frame_info *this_frame,
+ struct ia64_frame_cache *cache)
&& it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
{
/* alloc - start of a regular function. */
&& it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL))
{
/* alloc - start of a regular function. */
- int sor = (int) ((instr & 0x00078000000LL) >> 27);
- int sol = (int) ((instr & 0x00007f00000LL) >> 20);
- int sof = (int) ((instr & 0x000000fe000LL) >> 13);
+ int sol_bits = (int) ((instr & 0x00007f00000LL) >> 20);
+ int sof_bits = (int) ((instr & 0x000000fe000LL) >> 13);
int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
/* Verify that the current cfm matches what we think is the
int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
/* Verify that the current cfm matches what we think is the
addresses of various registers such as the return address.
We will instead treat the frame as frameless. */
if (!this_frame ||
addresses of various registers such as the return address.
We will instead treat the frame as frameless. */
if (!this_frame ||
{
/* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
{
/* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
int rM = (int) ((instr & 0x00007f00000LL) >> 20);
int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
int qp = (int) (instr & 0x0000000003fLL);
int rM = (int) ((instr & 0x00007f00000LL) >> 20);
int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
int qp = (int) (instr & 0x0000000003fLL);
{
/* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
{
/* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
int rM = (int) ((instr & 0x00007f00000LL) >> 20);
int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
int qp = (int) (instr & 0x0000000003fLL);
int rM = (int) ((instr & 0x00007f00000LL) >> 20);
int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
int qp = (int) (instr & 0x0000000003fLL);
The address to start spilling at is loaded into r2.
FIXME: Why r2? That's what gcc currently uses; it
could well be different for other compilers. */
/* Hmm... whether or not this will work will depend on
The address to start spilling at is loaded into r2.
FIXME: Why r2? That's what gcc currently uses; it
could well be different for other compilers. */
/* Hmm... whether or not this will work will depend on
- {
- struct gdbarch *gdbarch = get_frame_arch (this_frame);
- enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- get_frame_register (this_frame, sp_regnum, buf);
- saved_sp = extract_unsigned_integer (buf, 8, byte_order);
- }
+ saved_sp = get_frame_register_unsigned (this_frame,
+ sp_regnum);
- && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
- || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
+ && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
+ || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
- && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
- || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
+ && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
+ || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
&& (rM == unat_save_reg || rM == pr_save_reg))
{
/* We've found a spill of either the UNAT register or the PR
&& (rM == unat_save_reg || rM == pr_save_reg))
{
/* We've found a spill of either the UNAT register or the PR
- && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
- || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
+ && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
+ || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
{
/* We've found a spill of one of the preserved general purpose
if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
{
/* We've found a spill of one of the preserved general purpose
register if appropriate. */
cache->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
register if appropriate. */
cache->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
cache->bsp = extract_unsigned_integer (buf, 8, byte_order);
get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
cache->bsp = extract_unsigned_integer (buf, 8, byte_order);
get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
cfm = extract_unsigned_integer (buf, 8, byte_order);
get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
cfm = extract_unsigned_integer (buf, 8, byte_order);
CORE_ADDR prev_cfm, bsp, prev_bsp;
/* We want to calculate the previous bsp as the end of the previous
CORE_ADDR prev_cfm, bsp, prev_bsp;
/* We want to calculate the previous bsp as the end of the previous
- register stack frame. This corresponds to what the hardware bsp
- register will be if we pop the frame back which is why we might
- have been called. We know the beginning of the current frame is
- cache->bsp - cache->sof. This value in the previous frame points
- to the start of the output registers. We can calculate the end of
- that frame by adding the size of output:
- (sof (size of frame) - sol (size of locals)). */
+ register stack frame. This corresponds to what the hardware bsp
+ register will be if we pop the frame back which is why we might
+ have been called. We know the beginning of the current frame is
+ cache->bsp - cache->sof. This value in the previous frame points
+ to the start of the output registers. We can calculate the end of
+ that frame by adding the size of output:
+ (sof (size of frame) - sol (size of locals)). */
return frame_unwind_got_register (this_frame, regnum, 0);
}
else if (regnum == IA64_VFP_REGNUM)
{
/* If the function in question uses an automatic register (r32-r127)
return frame_unwind_got_register (this_frame, regnum, 0);
}
else if (regnum == IA64_VFP_REGNUM)
{
/* If the function in question uses an automatic register (r32-r127)
above. If the function lacks one of these frame pointers, we can
still provide a value since we know the size of the frame. */
return frame_unwind_got_constant (this_frame, regnum, cache->base);
above. If the function lacks one of these frame pointers, we can
still provide a value since we know the size of the frame. */
return frame_unwind_got_constant (this_frame, regnum, cache->base);
if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
{
/* Fetch predicate register rename base from current frame
if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
{
/* Fetch predicate register rename base from current frame
/* Adjust the register number to account for register rotation. */
regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
}
/* Adjust the register number to account for register rotation. */
regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
}
- prN = extract_bit_field (value_contents_all (pr_val),
- regnum - VP0_REGNUM, 1);
+ prN = extract_bit_field (value_contents_all (pr_val).data (),
+ regnum - VP0_REGNUM, 1);
- IA64_UNAT_REGNUM);
- unatN = extract_bit_field (value_contents_all (unat_val),
- regnum - IA64_NAT0_REGNUM, 1);
+ IA64_UNAT_REGNUM);
+ unatN = extract_bit_field (value_contents_all (unat_val).data (),
+ regnum - IA64_NAT0_REGNUM, 1);
- {
- read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
- pc = extract_unsigned_integer (buf, 8, byte_order);
- }
+ {
+ read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
+ pc = extract_unsigned_integer (buf, 8, byte_order);
+ }
else if (cache->frameless)
{
get_frame_register (this_frame, IA64_BR0_REGNUM, buf);
else if (cache->frameless)
{
get_frame_register (this_frame, IA64_BR0_REGNUM, buf);
else if (regnum == IA64_PSR_REGNUM)
{
/* We don't know how to get the complete previous PSR, but we need it
else if (regnum == IA64_PSR_REGNUM)
{
/* We don't know how to get the complete previous PSR, but we need it
- for the slot information when we unwind the pc (pc is formed of IP
- register plus slot information from PSR). To get the previous
- slot information, we mask it off the return address. */
+ for the slot information when we unwind the pc (pc is formed of IP
+ register plus slot information from PSR). To get the previous
+ slot information, we mask it off the return address. */
return frame_unwind_got_constant (this_frame, regnum, 0);
}
else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM)
return frame_unwind_got_constant (this_frame, regnum, 0);
}
else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM)
- IA64_BSP_REGNUM);
- prev_bsp = extract_unsigned_integer (value_contents_all (reg_val),
- 8, byte_order);
+ IA64_CFM_REGNUM);
+ prev_cfm = extract_unsigned_integer
+ (value_contents_all (reg_val).data (), 8, byte_order);
+ reg_val = ia64_frame_prev_register (this_frame, this_cache,
+ IA64_BSP_REGNUM);
+ prev_bsp = extract_unsigned_integer
+ (value_contents_all (reg_val).data (), 8, byte_order);
prev_bof = rse_address_add (prev_bsp, -(prev_cfm & 0x7f));
addr = rse_address_add (prev_bof, (regnum - IA64_GR32_REGNUM));
prev_bof = rse_address_add (prev_bsp, -(prev_cfm & 0x7f));
addr = rse_address_add (prev_bof, (regnum - IA64_GR32_REGNUM));
}
/* If we have stored a memory address, access the register. */
addr = cache->saved_regs[regnum];
if (addr != 0)
}
/* If we have stored a memory address, access the register. */
addr = cache->saved_regs[regnum];
if (addr != 0)
ia64_sigtramp_frame_cache (this_frame, this_cache);
(*this_id) = frame_id_build_special (cache->base,
ia64_sigtramp_frame_cache (this_frame, this_cache);
(*this_id) = frame_id_build_special (cache->base,
if (gdbarch_debug >= 1)
fprintf_unfiltered (gdb_stdlog,
"sigtramp frame id: code %s, stack %s, "
if (gdbarch_debug >= 1)
fprintf_unfiltered (gdb_stdlog,
"sigtramp frame id: code %s, stack %s, "
ia64_sigtramp_frame_prev_register (struct frame_info *this_frame,
void **this_cache, int regnum)
{
ia64_sigtramp_frame_prev_register (struct frame_info *this_frame,
void **this_cache, int regnum)
{
struct ia64_frame_cache *cache =
ia64_sigtramp_frame_cache (this_frame, this_cache);
gdb_assert (regnum >= 0);
struct ia64_frame_cache *cache =
ia64_sigtramp_frame_cache (this_frame, this_cache);
gdb_assert (regnum >= 0);
- read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
- pc = extract_unsigned_integer (buf, 8, byte_order);
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ pc = read_memory_unsigned_integer (addr, 8, byte_order);
}
pc &= ~0xf;
return frame_unwind_got_constant (this_frame, regnum, pc);
}
else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM)
}
pc &= ~0xf;
return frame_unwind_got_constant (this_frame, regnum, pc);
}
else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM)
SIGTRAMP_FRAME,
default_frame_unwind_stop_reason,
ia64_sigtramp_frame_this_id,
SIGTRAMP_FRAME,
default_frame_unwind_stop_reason,
ia64_sigtramp_frame_this_id,
- unw_word_t bsp, sof, sol, cfm, psr, ip;
- struct frame_info *this_frame = arg;
+ unw_word_t bsp, sof, cfm, psr, ip;
+ struct frame_info *this_frame = (struct frame_info *) arg;
case UNW_REG_IP:
/* Libunwind expects to see the pc value which means the slot number
from the psr must be merged with the ip word address. */
case UNW_REG_IP:
/* Libunwind expects to see the pc value which means the slot number
from the psr must be merged with the ip word address. */
- get_frame_register (this_frame, IA64_IP_REGNUM, buf);
- ip = extract_unsigned_integer (buf, 8, byte_order);
- get_frame_register (this_frame, IA64_PSR_REGNUM, buf);
- psr = extract_unsigned_integer (buf, 8, byte_order);
+ ip = get_frame_register_unsigned (this_frame, IA64_IP_REGNUM);
+ psr = get_frame_register_unsigned (this_frame, IA64_PSR_REGNUM);
register frame so we must account for the fact that
ptrace() will return a value for bsp that points *after*
the current register frame. */
register frame so we must account for the fact that
ptrace() will return a value for bsp that points *after*
the current register frame. */
- get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
- bsp = extract_unsigned_integer (buf, 8, byte_order);
- get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
- cfm = extract_unsigned_integer (buf, 8, byte_order);
- sof = gdbarch_tdep (gdbarch)->size_of_register_frame (this_frame, cfm);
+ bsp = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM);
+ cfm = get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM);
+ sof = tdep->size_of_register_frame (this_frame, cfm);
*val = ia64_rse_skip_regs (bsp, -sof);
break;
case UNW_IA64_AR_BSPSTORE:
/* Libunwind wants bspstore to be after the current register frame.
This is what ptrace() and gdb treats as the regular bsp value. */
*val = ia64_rse_skip_regs (bsp, -sof);
break;
case UNW_IA64_AR_BSPSTORE:
/* Libunwind wants bspstore to be after the current register frame.
This is what ptrace() and gdb treats as the regular bsp value. */
- get_frame_register (this_frame, IA64_BSP_REGNUM, buf);
- *val = extract_unsigned_integer (buf, 8, byte_order);
+ *val = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM);
- get_frame_register (this_frame, regnum, buf);
- *val = extract_unsigned_integer (buf, 8, byte_order);
+ *val = get_frame_register_unsigned (this_frame, regnum);
unw_fpreg_t *val, int write, void *arg)
{
int regnum = ia64_uw2gdb_regnum (uw_regnum);
unw_fpreg_t *val, int write, void *arg)
{
int regnum = ia64_uw2gdb_regnum (uw_regnum);
unw_word_t *val, int write, void *arg)
{
int regnum = ia64_uw2gdb_regnum (uw_regnum);
unw_word_t *val, int write, void *arg)
{
int regnum = ia64_uw2gdb_regnum (uw_regnum);
- unw_word_t bsp, sof, sol, cfm, psr, ip;
- struct regcache *regcache = arg;
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
- enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- long new_sof, old_sof;
- gdb_byte buf[MAX_REGISTER_SIZE];
+ unw_word_t bsp, sof, cfm, psr, ip;
+ struct regcache *regcache = (struct regcache *) arg;
+ struct gdbarch *gdbarch = regcache->arch ();
case UNW_REG_IP:
/* Libunwind expects to see the pc value which means the slot number
from the psr must be merged with the ip word address. */
case UNW_REG_IP:
/* Libunwind expects to see the pc value which means the slot number
from the psr must be merged with the ip word address. */
- regcache_cooked_read (regcache, IA64_IP_REGNUM, buf);
- ip = extract_unsigned_integer (buf, 8, byte_order);
- regcache_cooked_read (regcache, IA64_PSR_REGNUM, buf);
- psr = extract_unsigned_integer (buf, 8, byte_order);
+ regcache_cooked_read_unsigned (regcache, IA64_IP_REGNUM, &ip);
+ regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr);
register frame so we must account for the fact that
ptrace() will return a value for bsp that points *after*
the current register frame. */
register frame so we must account for the fact that
ptrace() will return a value for bsp that points *after*
the current register frame. */
- regcache_cooked_read (regcache, IA64_BSP_REGNUM, buf);
- bsp = extract_unsigned_integer (buf, 8, byte_order);
- regcache_cooked_read (regcache, IA64_CFM_REGNUM, buf);
- cfm = extract_unsigned_integer (buf, 8, byte_order);
+ regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp);
+ regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm);
case UNW_IA64_AR_BSPSTORE:
/* Libunwind wants bspstore to be after the current register frame.
This is what ptrace() and gdb treats as the regular bsp value. */
case UNW_IA64_AR_BSPSTORE:
/* Libunwind wants bspstore to be after the current register frame.
This is what ptrace() and gdb treats as the regular bsp value. */
- regcache_cooked_read (regcache, IA64_BSP_REGNUM, buf);
- *val = extract_unsigned_integer (buf, 8, byte_order);
+ regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, val);
- /* For all other registers, just unwind the value directly. */
- regcache_cooked_read (regcache, regnum, buf);
- *val = extract_unsigned_integer (buf, 8, byte_order);
+ /* For all other registers, just unwind the value directly. */
+ regcache_cooked_read_unsigned (regcache, regnum, val);
unw_fpreg_t *val, int write, void *arg)
{
int regnum = ia64_uw2gdb_regnum (uw_regnum);
unw_fpreg_t *val, int write, void *arg)
{
int regnum = ia64_uw2gdb_regnum (uw_regnum);
/* FIXME drow/2005-09-10: This code used to call
ia64_linux_xfer_unwind_table directly to fetch the unwind table
for the currently running ia64-linux kernel. That data should
/* FIXME drow/2005-09-10: This code used to call
ia64_linux_xfer_unwind_table directly to fetch the unwind table
for the currently running ia64-linux kernel. That data should
- x = target_read_alloc (¤t_target, TARGET_OBJECT_UNWIND_TABLE,
- NULL, buf_p);
-
- return x;
+ return target_read_alloc (current_inferior ()->top_target (),
+ TARGET_OBJECT_UNWIND_TABLE, NULL);
dip->format = UNW_INFO_FORMAT_REMOTE_TABLE;
dip->u.rti.name_ptr = (unw_word_t) bfd_get_filename (bfd);
dip->u.rti.segbase = segbase;
dip->format = UNW_INFO_FORMAT_REMOTE_TABLE;
dip->u.rti.name_ptr = (unw_word_t) bfd_get_filename (bfd);
dip->u.rti.segbase = segbase;
unw_word_t *dilap, void *arg)
{
struct obj_section *text_sec;
unw_word_t *dilap, void *arg)
{
struct obj_section *text_sec;
ret = ia64_find_unwind_table (objfile, ip, &di, &buf);
if (ret >= 0)
{
ret = ia64_find_unwind_table (objfile, ip, &di, &buf);
if (ret >= 0)
{
- get_frame_register (this_frame, IA64_CFM_REGNUM, buf);
- cfm = extract_unsigned_integer (buf, 8, byte_order);
+ cfm = get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM);
rrb_pr = (cfm >> 32) & 0x3f;
/* Adjust the register number to account for register rotation. */
regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
}
rrb_pr = (cfm >> 32) & 0x3f;
/* Adjust the register number to account for register rotation. */
regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
}
- unatN_val = extract_bit_field (value_contents_all (val),
- regnum - IA64_NAT0_REGNUM, 1);
+ unatN_val = extract_bit_field (value_contents_all (val).data (),
+ regnum - IA64_NAT0_REGNUM, 1);
CORE_ADDR prev_bsp, prev_cfm;
/* We want to calculate the previous bsp as the end of the previous
CORE_ADDR prev_bsp, prev_cfm;
/* We want to calculate the previous bsp as the end of the previous
- register stack frame. This corresponds to what the hardware bsp
- register will be if we pop the frame back which is why we might
- have been called. We know that libunwind will pass us back the
- beginning of the current frame so we should just add sof to it. */
- prev_bsp = extract_unsigned_integer (value_contents_all (val),
+ register stack frame. This corresponds to what the hardware bsp
+ register will be if we pop the frame back which is why we might
+ have been called. We know that libunwind will pass us back the
+ beginning of the current frame so we should just add sof to it. */
+ prev_bsp = extract_unsigned_integer (value_contents_all (val).data (),
{
if (libunwind_is_initialized ()
&& libunwind_frame_sniffer (self, this_frame, this_cache))
{
if (libunwind_is_initialized ()
&& libunwind_frame_sniffer (self, this_frame, this_cache))
NORMAL_FRAME,
default_frame_unwind_stop_reason,
ia64_libunwind_frame_this_id,
NORMAL_FRAME,
default_frame_unwind_stop_reason,
ia64_libunwind_frame_this_id,
libunwind_frame_this_id (this_frame, this_cache, &id);
if (frame_id_eq (id, outer_frame_id))
libunwind_frame_this_id (this_frame, this_cache, &id);
if (frame_id_eq (id, outer_frame_id))
/* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
method of getting previous registers. */
prev_ip_val = libunwind_frame_prev_register (this_frame, this_cache,
/* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
method of getting previous registers. */
prev_ip_val = libunwind_frame_prev_register (this_frame, this_cache,
{
if (libunwind_is_initialized ())
{
if (libunwind_sigtramp_frame_sniffer (self, this_frame, this_cache))
{
if (libunwind_is_initialized ())
{
if (libunwind_sigtramp_frame_sniffer (self, this_frame, this_cache))
SIGTRAMP_FRAME,
default_frame_unwind_stop_reason,
ia64_libunwind_sigtramp_frame_this_id,
SIGTRAMP_FRAME,
default_frame_unwind_stop_reason,
ia64_libunwind_sigtramp_frame_this_id,
/* Don't use the struct convention for anything but structure,
union, or array types. */
/* Don't use the struct convention for anything but structure,
union, or array types. */
- if (!(TYPE_CODE (type) == TYPE_CODE_STRUCT
- || TYPE_CODE (type) == TYPE_CODE_UNION
- || TYPE_CODE (type) == TYPE_CODE_ARRAY))
+ if (!(type->code () == TYPE_CODE_STRUCT
+ || type->code () == TYPE_CODE_UNION
+ || type->code () == TYPE_CODE_ARRAY))
struct type *float_elt_type;
float_elt_type = is_float_or_hfa_type (type);
if (float_elt_type != NULL)
{
struct type *float_elt_type;
float_elt_type = is_float_or_hfa_type (type);
if (float_elt_type != NULL)
{
- regcache_cooked_read (regcache, regnum, from);
- convert_typed_floating (from, ia64_ext_type (gdbarch),
- (char *)valbuf + offset, float_elt_type);
+ regcache->cooked_read (regnum, from);
+ target_float_convert (from, ia64_ext_type (gdbarch),
+ valbuf + offset, float_elt_type);
else if (!ia64_struct_type_p (type) && TYPE_LENGTH (type) < 8)
{
/* This is an integral value, and its size is less than 8 bytes.
else if (!ia64_struct_type_p (type) && TYPE_LENGTH (type) < 8)
{
/* This is an integral value, and its size is less than 8 bytes.
- These values are LSB-aligned, so extract the relevant bytes,
- and copy them into VALBUF. */
+ These values are LSB-aligned, so extract the relevant bytes,
+ and copy them into VALBUF. */
/* brobecker/2005-12-30: Actually, all integral values are LSB aligned,
so I suppose we should also add handling here for integral values
whose size is greater than 8. But I wasn't able to create such
/* brobecker/2005-12-30: Actually, all integral values are LSB aligned,
so I suppose we should also add handling here for integral values
whose size is greater than 8. But I wasn't able to create such
- ULONGEST val;
- regcache_cooked_read_unsigned (regcache, regnum, &val);
- memcpy ((char *)valbuf + offset, &val, reglen);
+ ULONGEST regval;
+ regcache_cooked_read_unsigned (regcache, regnum, ®val);
+ memcpy ((char *)valbuf + offset, ®val, reglen);
struct type *float_elt_type;
float_elt_type = is_float_or_hfa_type (type);
if (float_elt_type != NULL)
{
struct type *float_elt_type;
float_elt_type = is_float_or_hfa_type (type);
if (float_elt_type != NULL)
{
- convert_typed_floating ((char *)valbuf + offset, float_elt_type,
- to, ia64_ext_type (gdbarch));
- regcache_cooked_write (regcache, regnum, to);
+ target_float_convert (valbuf + offset, float_elt_type,
+ to, ia64_ext_type (gdbarch));
+ regcache->cooked_write (regnum, to);
int offset = 0;
int regnum = IA64_GR8_REGNUM;
int reglen = TYPE_LENGTH (register_type (gdbarch, IA64_GR8_REGNUM));
int offset = 0;
int regnum = IA64_GR8_REGNUM;
int reglen = TYPE_LENGTH (register_type (gdbarch, IA64_GR8_REGNUM));
- CORE_ADDR addr, endaddr;
-
- addr = obj_section_addr (osect);
- endaddr = obj_section_endaddr (osect);
+ CORE_ADDR addr = osect->addr ();
+ CORE_ADDR endaddr = osect->endaddr ();
- CORE_ADDR addr, endaddr;
-
- addr = obj_section_addr (osect);
- endaddr = obj_section_endaddr (osect);
+ CORE_ADDR addr = osect->addr ();
+ CORE_ADDR endaddr = osect->endaddr ();
struct obj_section *pc_section = find_pc_section (pc);
if (pc_section && (pc_section->the_bfd_section->flags & SEC_CODE))
struct obj_section *pc_section = find_pc_section (pc);
if (pc_section && (pc_section->the_bfd_section->flags & SEC_CODE))
ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int nslots, rseslots, memslots, slotnum, nfuncargs;
int floatreg;
ULONGEST bsp;
int nslots, rseslots, memslots, slotnum, nfuncargs;
int floatreg;
ULONGEST bsp;
- ULONGEST faddr = extract_unsigned_integer (value_contents (arg),
- 8, byte_order);
+ ULONGEST faddr = extract_unsigned_integer
+ (value_contents (arg).data (), 8, byte_order);
store_unsigned_integer (val_buf, 8, byte_order,
find_func_descr (regcache, faddr,
&funcdescaddr));
store_unsigned_integer (val_buf, 8, byte_order,
find_func_descr (regcache, faddr,
&funcdescaddr));
- if (!ia64_struct_type_p (type) && len < 8)
- {
- /* Integral types are LSB-aligned, so we have to be careful
- to insert the argument on the correct side of the buffer.
- This is why we use store_unsigned_integer. */
- store_unsigned_integer
- (val_buf, 8, byte_order,
- extract_unsigned_integer (value_contents (arg), len,
+ if (!ia64_struct_type_p (type) && len < 8)
+ {
+ /* Integral types are LSB-aligned, so we have to be careful
+ to insert the argument on the correct side of the buffer.
+ This is why we use store_unsigned_integer. */
+ store_unsigned_integer
+ (val_buf, 8, byte_order,
+ extract_unsigned_integer (value_contents (arg).data (), len,
- }
- else
- {
- /* This is either an 8bit integral type, or an aggregate.
- For 8bit integral type, there is no problem, we just
- copy the value over.
-
- For aggregates, the only potentially tricky portion
- is to write the last one if it is less than 8 bytes.
- In this case, the data is Byte0-aligned. Happy news,
- this means that we don't need to differentiate the
- handling of 8byte blocks and less-than-8bytes blocks. */
- memcpy (val_buf, value_contents (arg) + argoffset,
- (len > 8) ? 8 : len);
- }
+ }
+ else
+ {
+ /* This is either an 8bit integral type, or an aggregate.
+ For 8bit integral type, there is no problem, we just
+ copy the value over.
+
+ For aggregates, the only potentially tricky portion
+ is to write the last one if it is less than 8 bytes.
+ In this case, the data is Byte0-aligned. Happy news,
+ this means that we don't need to differentiate the
+ handling of 8byte blocks and less-than-8bytes blocks. */
+ memcpy (val_buf, value_contents (arg).data () + argoffset,
+ (len > 8) ? 8 : len);
+ }
- char to[MAX_REGISTER_SIZE];
- convert_typed_floating (value_contents (arg) + argoffset,
- float_elt_type, to,
- ia64_ext_type (gdbarch));
- regcache_cooked_write (regcache, floatreg, (void *)to);
+ gdb_byte to[IA64_FP_REGISTER_SIZE];
+ target_float_convert (value_contents (arg).data () + argoffset,
+ float_elt_type, to,
+ ia64_ext_type (gdbarch));
+ regcache->cooked_write (floatreg, to);
- if (struct_return)
- {
- regcache_cooked_write_unsigned (regcache, IA64_GR8_REGNUM,
- (ULONGEST) struct_addr);
- }
+ if (return_method == return_method_struct)
+ regcache_cooked_write_unsigned (regcache, IA64_GR8_REGNUM,
+ (ULONGEST) struct_addr);
ia64_print_insn (bfd_vma memaddr, struct disassemble_info *info)
{
info->bytes_per_line = SLOT_MULTIPLIER;
ia64_print_insn (bfd_vma memaddr, struct disassemble_info *info)
{
info->bytes_per_line = SLOT_MULTIPLIER;
/* If there is already a candidate, use it. */
arches = gdbarch_list_lookup_by_info (arches, &info);
if (arches != NULL)
return arches->gdbarch;
/* If there is already a candidate, use it. */
arches = gdbarch_list_lookup_by_info (arches, &info);
if (arches != NULL)
return arches->gdbarch;
gdbarch = gdbarch_alloc (&info, tdep);
tdep->size_of_register_frame = ia64_size_of_register_frame;
gdbarch = gdbarch_alloc (&info, tdep);
tdep->size_of_register_frame = ia64_size_of_register_frame;
set_gdbarch_memory_remove_breakpoint (gdbarch,
ia64_memory_remove_breakpoint);
set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
set_gdbarch_memory_remove_breakpoint (gdbarch,
ia64_memory_remove_breakpoint);
set_gdbarch_breakpoint_from_pc (gdbarch, ia64_breakpoint_from_pc);
set_gdbarch_read_pc (gdbarch, ia64_read_pc);
set_gdbarch_write_pc (gdbarch, ia64_write_pc);
set_gdbarch_read_pc (gdbarch, ia64_read_pc);
set_gdbarch_write_pc (gdbarch, ia64_write_pc);
set_gdbarch_unwind_pc (gdbarch, ia64_unwind_pc);
#ifdef HAVE_LIBUNWIND_IA64_H
frame_unwind_append_unwinder (gdbarch,
set_gdbarch_unwind_pc (gdbarch, ia64_unwind_pc);
#ifdef HAVE_LIBUNWIND_IA64_H
frame_unwind_append_unwinder (gdbarch,
frame_unwind_append_unwinder (gdbarch, &ia64_libunwind_frame_unwind);
frame_unwind_append_unwinder (gdbarch, &ia64_sigtramp_frame_unwind);
libunwind_frame_set_descr (gdbarch, &ia64_libunwind_descr);
frame_unwind_append_unwinder (gdbarch, &ia64_libunwind_frame_unwind);
frame_unwind_append_unwinder (gdbarch, &ia64_sigtramp_frame_unwind);
libunwind_frame_set_descr (gdbarch, &ia64_libunwind_descr);