+ { (unsigned) -1, 0x4e800420, 0 },
+
+ { 0, 0, 0 }
+ };
+
+/* Power 10 ELFv2 PLT call stubs */
+static const struct ppc_insn_pattern ppc64_standard_linkage9[] =
+ {
+ /* std %r2,0+40(%r1) <optional> */
+ { insn_ds (-1, -1, -1, 0, 1), insn_ds (62, 2, 1, 40, 0), 1 },
+
+ /* pld r12, <any> */
+ { prefix (-1, -1, 1, 0), prefix (0, 0, 1, 0), 0 },
+ { insn_d (-1, -1, -1, 0), insn_d (57, 12, 0, 0), 0 },
+
+ /* mtctr r12 */
+ { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
+
+ /* bctr */
+ { (unsigned) -1, 0x4e800420, 0 },
+
+ { 0, 0, 0 }
+ };
+
+static const struct ppc_insn_pattern ppc64_standard_linkage10[] =
+ {
+ /* std %r2,0+40(%r1) <optional> */
+ { insn_ds (-1, -1, -1, 0, 1), insn_ds (62, 2, 1, 40, 0), 1 },
+
+ /* paddi r12,<any> */
+ { prefix (-1, -1, 1, 0), prefix (2, 0, 1, 0), 0 },
+ { insn_d (-1, -1, -1, 0), insn_d (14, 12, 0, 0), 0 },
+
+ /* mtctr r12 <optional> */
+ { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
+
+ /* bctr */
+ { (unsigned) -1, 0x4e800420, 0 },
+
+ { 0, 0, 0 }
+ };
+
+static const struct ppc_insn_pattern ppc64_standard_linkage11[] =
+ {
+ /* std %r2,0+40(%r1) <optional> */
+ { insn_ds (-1, -1, -1, 0, 1), insn_ds (62, 2, 1, 40, 0), 1 },
+
+ /* li %r11,0 <optional> */
+ { insn_d (-1, -1, -1, 0), insn_d (14, 11, 0, 0), 1 },
+
+ /* sldi %r11,%r11,34 <eq to rldicr rx,ry,n, 63-n> <optional> */
+ { insn_md (-1, -1, -1, 0, 0, 1), insn_md (30, 11, 11, 34, 63-34, 0), 1 },
+
+ /* paddi r12, <any> */
+ { prefix (-1, -1, 1, 0), prefix (2, 0, 1, 0), 0 },
+ { insn_d (-1, -1, -1, 0), insn_d (14, 12, 0, 0), 0 },
+
+ /* ldx %r12,%r11,%r12 <optional> */
+ { (unsigned) -1, insn_x (31, 12, 11, 12, 21), 1 },
+
+ /* add %r12,%r11,%r12 <optional> */
+ { (unsigned) -1, insn_xo (31, 12, 11, 12, 0, 0, 40), 1 },
+
+ /* mtctr r12 */
+ { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
+
+ /* bctr */ // 13, 14, 15, 16
+ { (unsigned) -1, 0x4e800420, 0 },
+
+ { 0, 0, 0 }
+ };
+
+static const struct ppc_insn_pattern ppc64_standard_linkage12[] =
+ {
+ /* std %r2,0+40(%r1) <optional> */
+ { insn_ds (-1, -1, -1, 0, 1), insn_ds (62, 2, 1, 40, 0), 1 },
+
+ /* lis %r11,xxx@ha <equivalent addis rx, 0, val> */
+ /* addis r12, r2, <any> */
+ { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
+
+ /* ori %r11,%r11,xxx@l */
+ { insn_d (-1, -1, -1, 0), insn_d (24, 11, 11, 0), 0 },
+
+ /* sldi %r11,%r11,34 <optional> */
+ { (unsigned) -1, insn_md (30, 11, 11, 34, 63-34, 0), 1 },
+
+ /*paddi r12,<any> */
+ { prefix (-1, -1, 1, 0), prefix (2, 0, 1, 0), 0 },
+ { insn_d (-1, -1, -1, 0), insn_d (14, 12, 0, 0), 0 },
+
+ /* sldi %r11,%r11,34 <optional> */
+ { (unsigned) -1, insn_md (30, 11, 11, 34, 63-34, 0), 1 },
+
+ /* ldx %r12,%r11,%r12 <optional> */
+ { (unsigned) -1, insn_x (31, 12, 11, 12, 21), 1 },
+
+ /* add %r12,%r11,%r12 <optional> */
+ { (unsigned) -1, insn_xo (31, 12, 11, 12, 0, 0, 40), 1 },
+
+ /* mtctr r12 */
+ { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
+
+ /* bctr */ // 17, 18, 19, 20
+ { (unsigned) -1, 0x4e800420, 0 },