+Produces `simcrg.fst` (compatbile with Gtkwave).
+
+### simsoc
+
+Simulates a full SoC with a UART Wishbone master and a DDR3 model, and sends the init commands that libgram would send over serial.
+
+```
+./runsimsoc.sh
+```
+
+Produces `simsoc.fst` (compatible with Gtkwave).