-#define R_RELBYTE 017
-#define R_RELWORD 020
-#define R_PCRBYTE 022
-#define R_PCRWORD 023
-#define R_PCRLONG 024
-
-#define R_DIR32 06
-#define R_PCLONG 020
-#define R_RELBYTE 017
-#define R_RELWORD 020
-
-#define R_PCRBYTE 022
-#define R_PCRWORD 023
-#define R_PCRLONG 024
-
-
-#define R_PCR16L 128
-#define R_PCR26L 129
-#define R_VRT16 130
-#define R_HVRT16 131
-#define R_LVRT16 132
-#define R_VRT32 133
-#define R_RELLONG (0x11) /* Direct 32-bit relocation */
-#define R_IPRSHORT (0x18)
-#define R_IPRMED (0x19) /* 24-bit ip-relative relocation */
-#define R_IPRLONG (0x1a)
-#define R_OPTCALL (0x1b) /* 32-bit optimizable call (leafproc/sysproc) */
-#define R_OPTCALLX (0x1c) /* 64-bit optimizable call (leafproc/sysproc) */
-#define R_GETSEG (0x1d)
-#define R_GETPA (0x1e)
-#define R_TAGWORD (0x1f)
-#define R_JUMPTARG 0x20 /* strange 29k 00xx00xx reloc */
-#define R_MOVB1 0x41 /* Special h8 16bit or 8 bit reloc for mov.b */
-#define R_MOVB2 0x42 /* Special h8 opcode for 8bit which could
- be 16 */
-#define R_JMP1 0x43 /* Special h8 16bit jmp which could be
- pcrel */
-#define R_JMP2 0x44 /* a branch which used to be a jmp */
+#define R_DIR16 1
+#define R_DIR32 6
+#define R_IMAGEBASE 7
+#define R_RELBYTE 15
+#define R_RELWORD 16
+#define R_RELLONG 17
+#define R_PCRBYTE 18
+#define R_PCRWORD 19
+#define R_PCRLONG 20
+#define R_IPRSHORT 24
+#define R_IPRLONG 26
+#define R_GETSEG 29
+#define R_GETPA 30
+#define R_TAGWORD 31
+#define R_JUMPTARG 32 /* strange 29k 00xx00xx reloc */
+
+#define R_PCR16L 128
+#define R_PCR26L 129
+#define R_VRT16 130
+#define R_HVRT16 131
+#define R_LVRT16 132
+#define R_VRT32 133
+
+
+/* This reloc identifies mov.b instructions with a 16bit absolute
+ address. The linker tries to turn insns with this reloc into
+ an absolute 8-bit address. */
+#define R_MOV16B1 0x41
+
+/* This reloc identifies mov.b instructions which had a 16bit
+ absolute address which have been shortened into a 8-bit
+ absolute address. */
+#define R_MOV16B2 0x42
+
+/* This reloc identifies jmp insns with a 16bit target address;
+ the linker tries to turn these insns into bra insns with
+ an 8bit pc-relative target. */
+#define R_JMP1 0x43
+
+/* This reloc identifies a bra with an 8-bit pc-relative
+ target that was formerlly a jmp insn with a 16bit target. */
+#define R_JMP2 0x44
+
+/* ??? */
+#define R_RELLONG_NEG 0x45
+
+/* This reloc identifies jmp insns with a 24bit target address;
+ the linker tries to turn these insns into bra insns with
+ an 8bit pc-relative target. */
+#define R_JMPL1 0x46
+
+/* This reloc identifies a bra with an 8-bit pc-relative
+ target that was formerlly a jmp insn with a 24bit target. */
+#define R_JMPL2 0x47
+
+/* This reloc identifies mov.b instructions with a 24bit absolute
+ address. The linker tries to turn insns with this reloc into
+ an absolute 8-bit address. */
+
+#define R_MOV24B1 0x48
+
+/* This reloc identifies mov.b instructions which had a 24bit
+ absolute address which have been shortened into a 8-bit
+ absolute address. */
+#define R_MOV24B2 0x49
+
+/* An h8300 memory indirect jump/call. Forces the address of the jump/call
+ target into the function vector (in page zero), and the address of the
+ vector entry to be placed in the jump/call instruction. */
+#define R_MEM_INDIRECT 0x4a
+
+/* This reloc identifies a 16bit pc-relative branch target which was
+ shortened into an 8bit pc-relative branch target. */
+#define R_PCRWORD_B 0x4b
+
+/* This reloc identifies mov.[wl] instructions with a 32/24 bit
+ absolute address; the linker may turn this into a mov.[wl]
+ insn with a 16bit absolute address. */
+#define R_MOVL1 0x4c
+
+/* This reloc identifies mov.[wl] insns which formerlly had
+ a 32/24bit absolute address and now have a 16bit absolute address. */
+#define R_MOVL2 0x4d
+
+/* This reloc identifies a bCC:8 which will have it's condition
+ inverted and its target redirected to the target of the branch
+ in the following insn. */
+#define R_BCC_INV 0x4e
+
+/* This reloc identifies a jmp instruction that has been deleted. */
+#define R_JMP_DEL 0x4f
+
+/* Z8k modes */
+#define R_IMM16 0x01 /* 16 bit abs */
+#define R_JR 0x02 /* jr 8 bit disp */
+#define R_IMM4L 0x23 /* low nibble */
+#define R_IMM8 0x22 /* 8 bit abs */
+#define R_IMM32 R_RELLONG /* 32 bit abs */
+#define R_CALL R_DA /* Absolute address which could be a callr */
+#define R_JP R_DA /* Absolute address which could be a jp */
+#define R_REL16 0x04 /* 16 bit PC rel */
+#define R_CALLR 0x05 /* callr 12 bit disp */
+#define R_SEG 0x10 /* set if in segmented mode */
+#define R_IMM4H 0x24 /* high nibble */
+#define R_DISP7 0x25 /* djnz displacement */
+
+/* H8500 modes */
+
+#define R_H8500_IMM8 1 /* 8 bit immediate */
+#define R_H8500_IMM16 2 /* 16 bit immediate */
+#define R_H8500_PCREL8 3 /* 8 bit pcrel */
+#define R_H8500_PCREL16 4 /* 16 bit pcrel */
+#define R_H8500_HIGH8 5 /* high 8 bits of 24 bit address */
+#define R_H8500_LOW16 7 /* low 16 bits of 24 bit immediate */
+#define R_H8500_IMM24 6 /* 24 bit immediate */
+#define R_H8500_IMM32 8 /* 32 bit immediate */
+#define R_H8500_HIGH16 9 /* high 16 bits of 32 bit immediate */
+
+/* W65 modes */
+
+#define R_W65_ABS8 1 /* addr & 0xff */
+#define R_W65_ABS16 2 /* addr & 0xffff */
+#define R_W65_ABS24 3 /* addr & 0xffffff */
+
+#define R_W65_ABS8S8 4 /* (addr >> 8) & 0xff */
+#define R_W65_ABS8S16 5 /* (addr >> 16) & 0xff */
+
+#define R_W65_ABS16S8 6 /* (addr >> 8) & 0ffff */
+#define R_W65_ABS16S16 7 /* (addr >> 16) & 0ffff */
+
+#define R_W65_PCR8 8
+#define R_W65_PCR16 9
+
+#define R_W65_DP 10 /* direct page 8 bits only */
+
+#endif /* GNU_COFF_INTERNAL_H */