+TO SORT
+
+28feb2022
+
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=485> icache
+ * EUR 1500 (shared with [[tplaten]])
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=469> dcache
+ * EUR 1500 (shared with [[tplaten]])
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=491> mmu
+ * EUR 1000 (shared with [[tplaten]])
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL Formal (donated)
+ * EUR 500 (shared with [[programmerjake]])
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
+ * EUR 400 (shared with [[programmerjake]])
+
+before that
+
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=686> create Power ISA test API
+ - EUR 1600
+ - EUR 800 shared with [[klehman]]
+ - EUR 800 shared with [[lkcl]]
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
+ - EUR 800
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
+ - EUR 500
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
+
+
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
+ - EUR 150
+ - donated
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
+ - EUR 200
+ - donated
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
+ - EUR 150
+ - donated
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
+ - EUR 200
+ - donated
+ - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
+ - EUR 700
+ - (lip6.fr donated)
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
+ - (total EUR 400 25% donated by LIP6)
+ - EUR 100 lkcl
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
+ - EUR 900
+ - shared with [[lxo]]
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
+ - EUR 1100
+ - shared with lauri, jacob
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
+ - EUR 1250
+ - Shared 50% with Staf
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
+ - EUR 300
+ - Shared with Staf, cole
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
+ - EUR 450
+ - Shared with Staf
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
+ - Project 2019-10-043 06dec2020 wishbone
+ - EUR (TBD)
+
+### Project 2019-10-029 14mar2020 coriolis2
+
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
+ - (total EUR 100 shared 50% with staf)
+ - EUR 50 lkcl
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
+ - (total EUR 1500 shared 50% with LIP6)
+ - EUR 750 lkcl
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
+ - (total EUR 400 shared 75% with LIP6)
+ - EUR 300 lkcl
+
+### Project 2019-02-012 06dec2020 Core
+
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
+ - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
+ - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
+ - EUR 750 donated
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
+ - EUR 1500
+
+### Project 2019-10-043 06dec2020 wishbone
+
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
+ - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
+ - EUR 200
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
+ - EUR 100
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
+ - EUR 200
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
+ - EUR 100
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
+ - EUR 200
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
+ - EUR 450
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
+ - EUR 100
+ - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
+ - EUR 200 donated
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
+ - EUR 250 (share with cole)
+
+### Project 2019-10-032 06dec2020 proofs
+
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
+ - parent #195
+ - EUR 400 donated
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
+ - parent #195
+ - EUR 300 donated
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
+ - EUR 400 donated
+ - parent #195
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
+ - EUR 400 donated
+ - parent #195
+
+## Submitted for NLNet RFP
+
+submitted 2021-dec-09 but not confirmed paid
+
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=709> better Partitioned eq (Assign)
+ - EUR 300
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=707> Partitioned Cat
+ - EUR 250
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=200> IEEE754 FP layout
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
+ - EUR 800 shared between:
+ - EUR 500 [[lkcl]]
+ - EUR 300 [[tplaten]]
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
+ - EUR 5500 shared between:
+ - EUR 3850 lkcl
+ - EUR 1650 Others
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
+ - EUR 1600
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
+ - EUR 600
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=712> ISACaller supporting XLEN
+ - EUR 500 shared between:
+ - EUR 100 [[lkcl]]
+ - EUR 325 dmitry
+ - EUR 75 maciej
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=730> adapt ALU test cases
+
+
+### Project 2019-02-012 04sep2020 Core
+
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
+ - EUR 2000 total, shared with florent. EUR 1200
+
+### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
+
+## Paid
+
+donation from NLNet confirmed received:
+
+### coriolis2 2021-apr-04
+
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
+ - EUR 3000
+ - shared with Staf 50%
+
+### 2019-10P-046 19-aug-2020 NLNet 2019-10-046 Formal Standards OpenPOWER