-In projects such as the Libre RISCV SoC, commercial grade communications bus infrastructure is needed. Ordinarily this would mean AXI4 however it is not only patented but its patent holder has begun denying licenses due to the US trade war.
+In projects such as the Libre RISC-V SoC, commercial grade System-on-Chip
+(SoC) bus infrastructure is needed. Nowadays this often means AMBA AXI4,
+AXI4-lite or AXI4-Stream, all published by ARM Limited. The AXI family is
+"royality-free" and it is not only patented but its patent holder has
+begun denying licenses due to the US Trade War.
+
+The main alternative with large adoption is Wishbone, which is an Open
+Standard in contrast to AXI. However Wishbone does not have a "streaming"
+capability, which is typically needed for high-throughput data pathes and
+interfaces, e.g. for video applications and High-Performance Computing
+(HPC).