-Hagen Sankowski is a Senior ASIC Design Engineer, with Experiences
-thru the whole Design Flow, from Digital Entry (Verilog HDL, VHDL)
-to DSM Backend and back. FPGA knowledge for Xilinx, Altera, Lattice
-and MicroSemi. Inventor and Patentee for a FPGA structure. Open Source
-Evangelist, always interested in challenging FPGA and migration projects.
+Hagen Sankowski is a Senior ASIC Design Engineer, with 20-year Experiences
+thru the whole Design Flow, from Digital Entry (Verilog HDL, VHDL) to
+DSM Backend and back. He has FPGA knowledge for Xilinx, Altera, Lattice
+and MicroSemi. Inventor and Patentee for a FPGA structure. Open Source
+Evangelist, member of the LibreSilicon project Team also.