+ " (subsignal tx (pins o A0))"
+ " (subsignal rx (pins i A1))"
+ " (attrs IOSTANDARD=LVCMOS33))")
+
+
+class ConnectorTestCase(FHDLTestCase):
+ def test_string(self):
+ c = Connector("pmod", 0, "A0 A1 A2 A3 - - A4 A5 A6 A7 - -")
+ self.assertEqual(c.name, "pmod")
+ self.assertEqual(c.number, 0)
+ self.assertEqual(c.mapping, OrderedDict([
+ ("1", "A0"),
+ ("2", "A1"),
+ ("3", "A2"),
+ ("4", "A3"),
+ ("7", "A4"),
+ ("8", "A5"),
+ ("9", "A6"),
+ ("10", "A7"),
+ ]))
+ self.assertEqual(list(c), [
+ ("pmod_0:1", "A0"),
+ ("pmod_0:2", "A1"),
+ ("pmod_0:3", "A2"),
+ ("pmod_0:4", "A3"),
+ ("pmod_0:7", "A4"),
+ ("pmod_0:8", "A5"),
+ ("pmod_0:9", "A6"),
+ ("pmod_0:10", "A7"),
+ ])
+ self.assertEqual(repr(c),
+ "(connector pmod 0 1=>A0 2=>A1 3=>A2 4=>A3 7=>A4 8=>A5 9=>A6 10=>A7)")
+
+ def test_dict(self):
+ c = Connector("ext", 1, {"DP0": "A0", "DP1": "A1"})
+ self.assertEqual(c.name, "ext")
+ self.assertEqual(c.number, 1)
+ self.assertEqual(c.mapping, OrderedDict([
+ ("DP0", "A0"),
+ ("DP1", "A1"),
+ ]))
+
+ def test_wrong_io(self):
+ with self.assertRaises(TypeError,
+ msg="Connector I/Os must be a dictionary or a string, not []"):
+ Connector("pmod", 0, [])
+
+ def test_wrong_dict_key_value(self):
+ with self.assertRaises(TypeError,
+ msg="Connector pin name must be a string, not 0"):
+ Connector("pmod", 0, {0: "A"})
+ with self.assertRaises(TypeError,
+ msg="Platform pin name must be a string, not 0"):
+ Connector("pmod", 0, {"A": 0})