+ with self.assertRaisesRegex(DomainError,
+ r"^Signal \(rst sync\) refers to reset of reset-less domain 'sync'$"):
+ DomainLowerer()(f)
+
+
+class SampleLowererTestCase(FHDLTestCase):
+ def setUp(self):
+ self.i = Signal()
+ self.o1 = Signal()
+ self.o2 = Signal()
+ self.o3 = Signal()
+
+ def test_lower_signal(self):
+ f = Fragment()
+ f.add_statements(
+ self.o1.eq(Sample(self.i, 2, "sync")),
+ self.o2.eq(Sample(self.i, 1, "sync")),
+ self.o3.eq(Sample(self.i, 1, "pix")),
+ )
+
+ f = SampleLowerer()(f)
+ self.assertRepr(f.statements, """
+ (
+ (eq (sig o1) (sig $sample$s$i$sync$2))
+ (eq (sig o2) (sig $sample$s$i$sync$1))
+ (eq (sig o3) (sig $sample$s$i$pix$1))
+ (eq (sig $sample$s$i$sync$1) (sig i))
+ (eq (sig $sample$s$i$sync$2) (sig $sample$s$i$sync$1))
+ (eq (sig $sample$s$i$pix$1) (sig i))
+ )
+ """)
+ self.assertEqual(len(f.drivers["sync"]), 2)
+ self.assertEqual(len(f.drivers["pix"]), 1)
+
+ def test_lower_const(self):
+ f = Fragment()
+ f.add_statements(
+ self.o1.eq(Sample(1, 2, "sync")),
+ )
+
+ f = SampleLowerer()(f)
+ self.assertRepr(f.statements, """
+ (
+ (eq (sig o1) (sig $sample$c$1$sync$2))
+ (eq (sig $sample$c$1$sync$1) (const 1'd1))
+ (eq (sig $sample$c$1$sync$2) (sig $sample$c$1$sync$1))
+ )
+ """)
+ self.assertEqual(len(f.drivers["sync"]), 2)
+
+
+class SwitchCleanerTestCase(FHDLTestCase):
+ def test_clean(self):
+ a = Signal()
+ b = Signal()
+ c = Signal()
+ stmts = [
+ Switch(a, {
+ 1: a.eq(0),
+ 0: [
+ b.eq(1),
+ Switch(b, {1: [
+ Switch(a|b, {})
+ ]})
+ ]
+ })
+ ]
+
+ self.assertRepr(SwitchCleaner()(stmts), """
+ (
+ (switch (sig a)
+ (case 1
+ (eq (sig a) (const 1'd0)))
+ (case 0
+ (eq (sig b) (const 1'd1)))
+ )
+ )
+ """)
+
+
+class LHSGroupAnalyzerTestCase(FHDLTestCase):
+ def test_no_group_unrelated(self):
+ a = Signal()
+ b = Signal()
+ stmts = [
+ a.eq(0),
+ b.eq(0),
+ ]
+
+ groups = LHSGroupAnalyzer()(stmts)
+ self.assertEqual(list(groups.values()), [
+ SignalSet((a,)),
+ SignalSet((b,)),
+ ])
+
+ def test_group_related(self):
+ a = Signal()
+ b = Signal()
+ stmts = [
+ a.eq(0),
+ Cat(a, b).eq(0),
+ ]
+
+ groups = LHSGroupAnalyzer()(stmts)
+ self.assertEqual(list(groups.values()), [
+ SignalSet((a, b)),
+ ])
+
+ def test_no_loops(self):
+ a = Signal()
+ b = Signal()
+ stmts = [
+ a.eq(0),
+ Cat(a, b).eq(0),
+ Cat(a, b).eq(0),
+ ]
+
+ groups = LHSGroupAnalyzer()(stmts)
+ self.assertEqual(list(groups.values()), [
+ SignalSet((a, b)),
+ ])
+
+ def test_switch(self):
+ a = Signal()
+ b = Signal()
+ stmts = [
+ a.eq(0),
+ Switch(a, {
+ 1: b.eq(0),
+ })
+ ]
+
+ groups = LHSGroupAnalyzer()(stmts)
+ self.assertEqual(list(groups.values()), [
+ SignalSet((a,)),
+ SignalSet((b,)),
+ ])
+
+ def test_lhs_empty(self):
+ stmts = [
+ Cat().eq(0)
+ ]
+
+ groups = LHSGroupAnalyzer()(stmts)
+ self.assertEqual(list(groups.values()), [
+ ])
+
+
+class LHSGroupFilterTestCase(FHDLTestCase):
+ def test_filter(self):
+ a = Signal()
+ b = Signal()
+ c = Signal()
+ stmts = [
+ Switch(a, {
+ 1: a.eq(0),
+ 0: [
+ b.eq(1),
+ Switch(b, {1: []})
+ ]
+ })
+ ]
+
+ self.assertRepr(LHSGroupFilter(SignalSet((a,)))(stmts), """
+ (
+ (switch (sig a)
+ (case 1
+ (eq (sig a) (const 1'd0)))
+ (case 0 )
+ )
+ )
+ """)
+
+ def test_lhs_empty(self):
+ stmts = [
+ Cat().eq(0)
+ ]
+
+ self.assertRepr(LHSGroupFilter(SignalSet())(stmts), "()")