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update: Xing's profile
[libreriscv.git]
/
shakti
/
m_class
/
pinmux.mdwn
diff --git
a/shakti/m_class/pinmux.mdwn
b/shakti/m_class/pinmux.mdwn
index bb0856bab5864c05c73137160d0ba56d9c471e39..4dbc8815f8470e144b928111f74920f2d1241a40 100644
(file)
--- a/
shakti/m_class/pinmux.mdwn
+++ b/
shakti/m_class/pinmux.mdwn
@@
-41,6
+41,11
@@
Introductions:
and currently responsible for coordinating the design of a fully Libre
RISC-V SoC in collaboration with the RISE Group, IIT Madras, Shakti Project.
and currently responsible for coordinating the design of a fully Libre
RISC-V SoC in collaboration with the RISE Group, IIT Madras, Shakti Project.
+* Xing GUO(xing) - undergraduate (3rd year) from Southeast
+ University, EE student, C/C++, Python, Verilog, assembly(not very proficient),
+ Haskell(not very proficient). RTL design, server maintenance.
+ Email: higuoxing at gmail dot com
+
Hardware available:
* lkcl: ZC706
Hardware available:
* lkcl: ZC706