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sim: enable hardware support by default
[binutils-gdb.git]
/
sim
/
frv
/
model.c
diff --git
a/sim/frv/model.c
b/sim/frv/model.c
index eb1829d1996352973cf87fda6e6f91c457b324ff..176320a8bf3ff4b4f77c3fb01c39a8c5080cb2f3 100644
(file)
--- a/
sim/frv/model.c
+++ b/
sim/frv/model.c
@@
-2,7
+2,7
@@
THIS FILE IS MACHINE GENERATED WITH CGEN.
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright 1996-20
10
Free Software Foundation, Inc.
+Copyright 1996-20
21
Free Software Foundation, Inc.
This file is part of the GNU simulators.
This file is part of the GNU simulators.
@@
-17,8
+17,7
@@
This file is part of the GNU simulators.
License for more details.
You should have received a copy of the GNU General Public License along
License for more details.
You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+ with this program; if not, see <http://www.gnu.org/licenses/>.
*/
*/
@@
-107353,43
+107352,43
@@
simple_model_init (SIM_CPU *cpu)
#define TIMING_DATA(td) 0
#endif
#define TIMING_DATA(td) 0
#endif
-static const MODEL frv_models[] =
+static const
SIM_
MODEL frv_models[] =
{
{ "frv", & frv_mach, MODEL_FRV, TIMING_DATA (& frv_timing[0]), frv_model_init },
{ 0 }
};
{
{ "frv", & frv_mach, MODEL_FRV, TIMING_DATA (& frv_timing[0]), frv_model_init },
{ 0 }
};
-static const MODEL fr550_models[] =
+static const
SIM_
MODEL fr550_models[] =
{
{ "fr550", & fr550_mach, MODEL_FR550, TIMING_DATA (& fr550_timing[0]), fr550_model_init },
{ 0 }
};
{
{ "fr550", & fr550_mach, MODEL_FR550, TIMING_DATA (& fr550_timing[0]), fr550_model_init },
{ 0 }
};
-static const MODEL fr500_models[] =
+static const
SIM_
MODEL fr500_models[] =
{
{ "fr500", & fr500_mach, MODEL_FR500, TIMING_DATA (& fr500_timing[0]), fr500_model_init },
{ 0 }
};
{
{ "fr500", & fr500_mach, MODEL_FR500, TIMING_DATA (& fr500_timing[0]), fr500_model_init },
{ 0 }
};
-static const MODEL tomcat_models[] =
+static const
SIM_
MODEL tomcat_models[] =
{
{ "tomcat", & tomcat_mach, MODEL_TOMCAT, TIMING_DATA (& tomcat_timing[0]), tomcat_model_init },
{ 0 }
};
{
{ "tomcat", & tomcat_mach, MODEL_TOMCAT, TIMING_DATA (& tomcat_timing[0]), tomcat_model_init },
{ 0 }
};
-static const MODEL fr400_models[] =
+static const
SIM_
MODEL fr400_models[] =
{
{ "fr400", & fr400_mach, MODEL_FR400, TIMING_DATA (& fr400_timing[0]), fr400_model_init },
{ 0 }
};
{
{ "fr400", & fr400_mach, MODEL_FR400, TIMING_DATA (& fr400_timing[0]), fr400_model_init },
{ 0 }
};
-static const MODEL fr450_models[] =
+static const
SIM_
MODEL fr450_models[] =
{
{ "fr450", & fr450_mach, MODEL_FR450, TIMING_DATA (& fr450_timing[0]), fr450_model_init },
{ 0 }
};
{
{ "fr450", & fr450_mach, MODEL_FR450, TIMING_DATA (& fr450_timing[0]), fr450_model_init },
{ 0 }
};
-static const MODEL simple_models[] =
+static const
SIM_
MODEL simple_models[] =
{
{ "simple", & simple_mach, MODEL_SIMPLE, TIMING_DATA (& simple_timing[0]), simple_model_init },
{ 0 }
{
{ "simple", & simple_mach, MODEL_SIMPLE, TIMING_DATA (& simple_timing[0]), simple_model_init },
{ 0 }
@@
-107397,7
+107396,7
@@
static const MODEL simple_models[] =
/* The properties of this cpu's implementation. */
/* The properties of this cpu's implementation. */
-static const MACH_IMP_PROPERTIES frvbf_imp_properties =
+static const
SIM_
MACH_IMP_PROPERTIES frvbf_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
{
sizeof (SIM_CPU),
#if WITH_SCACHE
@@
-107439,7
+107438,7
@@
frv_init_cpu (SIM_CPU *cpu)
#endif
}
#endif
}
-const MACH frv_mach =
+const
SIM_
MACH frv_mach =
{
"frv", "frv", MACH_FRV,
32, 32, & frv_models[0], & frvbf_imp_properties,
{
"frv", "frv", MACH_FRV,
32, 32, & frv_models[0], & frvbf_imp_properties,
@@
-107465,7
+107464,7
@@
fr550_init_cpu (SIM_CPU *cpu)
#endif
}
#endif
}
-const MACH fr550_mach =
+const
SIM_
MACH fr550_mach =
{
"fr550", "fr550", MACH_FR550,
32, 32, & fr550_models[0], & frvbf_imp_properties,
{
"fr550", "fr550", MACH_FR550,
32, 32, & fr550_models[0], & frvbf_imp_properties,
@@
-107491,7
+107490,7
@@
fr500_init_cpu (SIM_CPU *cpu)
#endif
}
#endif
}
-const MACH fr500_mach =
+const
SIM_
MACH fr500_mach =
{
"fr500", "fr500", MACH_FR500,
32, 32, & fr500_models[0], & frvbf_imp_properties,
{
"fr500", "fr500", MACH_FR500,
32, 32, & fr500_models[0], & frvbf_imp_properties,
@@
-107517,7
+107516,7
@@
tomcat_init_cpu (SIM_CPU *cpu)
#endif
}
#endif
}
-const MACH tomcat_mach =
+const
SIM_
MACH tomcat_mach =
{
"tomcat", "tomcat", MACH_TOMCAT,
32, 32, & tomcat_models[0], & frvbf_imp_properties,
{
"tomcat", "tomcat", MACH_TOMCAT,
32, 32, & tomcat_models[0], & frvbf_imp_properties,
@@
-107543,7
+107542,7
@@
fr400_init_cpu (SIM_CPU *cpu)
#endif
}
#endif
}
-const MACH fr400_mach =
+const
SIM_
MACH fr400_mach =
{
"fr400", "fr400", MACH_FR400,
32, 32, & fr400_models[0], & frvbf_imp_properties,
{
"fr400", "fr400", MACH_FR400,
32, 32, & fr400_models[0], & frvbf_imp_properties,
@@
-107569,7
+107568,7
@@
fr450_init_cpu (SIM_CPU *cpu)
#endif
}
#endif
}
-const MACH fr450_mach =
+const
SIM_
MACH fr450_mach =
{
"fr450", "fr450", MACH_FR450,
32, 32, & fr450_models[0], & frvbf_imp_properties,
{
"fr450", "fr450", MACH_FR450,
32, 32, & fr450_models[0], & frvbf_imp_properties,
@@
-107595,7
+107594,7
@@
simple_init_cpu (SIM_CPU *cpu)
#endif
}
#endif
}
-const MACH simple_mach =
+const
SIM_
MACH simple_mach =
{
"simple", "simple", MACH_SIMPLE,
32, 32, & simple_models[0], & frvbf_imp_properties,
{
"simple", "simple", MACH_SIMPLE,
32, 32, & simple_models[0], & frvbf_imp_properties,