- case nir_op_u2u8: {
- Temp src = get_alu_src(ctx, instr->src[0]);
- /* we can actually just say dst = src */
- if (src.regClass() == s1)
- bld.copy(Definition(dst), src);
- else
- emit_extract_vector(ctx, src, 0, dst);
- break;
- }
- case nir_op_i2i16: {
- Temp src = get_alu_src(ctx, instr->src[0]);
- if (instr->src[0].src.ssa->bit_size == 8) {
- if (dst.regClass() == s1) {
- bld.sop1(aco_opcode::s_sext_i32_i8, Definition(dst), Operand(src));
- } else {
- assert(src.regClass() == v1b);
- aco_ptr<SDWA_instruction> sdwa{create_instruction<SDWA_instruction>(aco_opcode::v_mov_b32, asSDWA(Format::VOP1), 1, 1)};
- sdwa->operands[0] = Operand(src);
- sdwa->definitions[0] = Definition(dst);
- sdwa->sel[0] = sdwa_sbyte;
- sdwa->dst_sel = sdwa_sword;
- ctx->block->instructions.emplace_back(std::move(sdwa));
- }
- } else {
- Temp src = get_alu_src(ctx, instr->src[0]);
- /* we can actually just say dst = src */
- if (src.regClass() == s1)
- bld.copy(Definition(dst), src);
- else
- emit_extract_vector(ctx, src, 0, dst);
- }
- break;
- }
- case nir_op_u2u16: {
- Temp src = get_alu_src(ctx, instr->src[0]);
- if (instr->src[0].src.ssa->bit_size == 8) {
- if (dst.regClass() == s1)
- bld.sop2(aco_opcode::s_and_b32, Definition(dst), bld.def(s1, scc), Operand(0xFFu), src);
- else {
- assert(src.regClass() == v1b);
- aco_ptr<SDWA_instruction> sdwa{create_instruction<SDWA_instruction>(aco_opcode::v_mov_b32, asSDWA(Format::VOP1), 1, 1)};
- sdwa->operands[0] = Operand(src);
- sdwa->definitions[0] = Definition(dst);
- sdwa->sel[0] = sdwa_ubyte;
- sdwa->dst_sel = sdwa_uword;
- ctx->block->instructions.emplace_back(std::move(sdwa));
- }
- } else {
- Temp src = get_alu_src(ctx, instr->src[0]);
- /* we can actually just say dst = src */
- if (src.regClass() == s1)
- bld.copy(Definition(dst), src);
- else
- emit_extract_vector(ctx, src, 0, dst);
- }
- break;
- }
- case nir_op_i2i32: {
- Temp src = get_alu_src(ctx, instr->src[0]);
- if (instr->src[0].src.ssa->bit_size == 8) {
- if (dst.regClass() == s1) {
- bld.sop1(aco_opcode::s_sext_i32_i8, Definition(dst), Operand(src));
- } else {
- assert(src.regClass() == v1b);
- aco_ptr<SDWA_instruction> sdwa{create_instruction<SDWA_instruction>(aco_opcode::v_mov_b32, asSDWA(Format::VOP1), 1, 1)};
- sdwa->operands[0] = Operand(src);
- sdwa->definitions[0] = Definition(dst);
- sdwa->sel[0] = sdwa_sbyte;
- sdwa->dst_sel = sdwa_sdword;
- ctx->block->instructions.emplace_back(std::move(sdwa));
- }
- } else if (instr->src[0].src.ssa->bit_size == 16) {
- if (dst.regClass() == s1) {
- bld.sop1(aco_opcode::s_sext_i32_i16, Definition(dst), Operand(src));
- } else {
- assert(src.regClass() == v2b);
- aco_ptr<SDWA_instruction> sdwa{create_instruction<SDWA_instruction>(aco_opcode::v_mov_b32, asSDWA(Format::VOP1), 1, 1)};
- sdwa->operands[0] = Operand(src);
- sdwa->definitions[0] = Definition(dst);
- sdwa->sel[0] = sdwa_sword;
- sdwa->dst_sel = sdwa_udword;
- ctx->block->instructions.emplace_back(std::move(sdwa));
- }
- } else if (instr->src[0].src.ssa->bit_size == 64) {
- /* we can actually just say dst = src, as it would map the lower register */
- emit_extract_vector(ctx, src, 0, dst);
- } else {
- fprintf(stderr, "Unimplemented NIR instr bit size: ");
- nir_print_instr(&instr->instr, stderr);
- fprintf(stderr, "\n");
- }
- break;
- }
- case nir_op_u2u32: {
- Temp src = get_alu_src(ctx, instr->src[0]);
- if (instr->src[0].src.ssa->bit_size == 8) {
- if (dst.regClass() == s1)
- bld.sop2(aco_opcode::s_and_b32, Definition(dst), bld.def(s1, scc), Operand(0xFFu), src);
- else {
- assert(src.regClass() == v1b);
- aco_ptr<SDWA_instruction> sdwa{create_instruction<SDWA_instruction>(aco_opcode::v_mov_b32, asSDWA(Format::VOP1), 1, 1)};
- sdwa->operands[0] = Operand(src);
- sdwa->definitions[0] = Definition(dst);
- sdwa->sel[0] = sdwa_ubyte;
- sdwa->dst_sel = sdwa_udword;
- ctx->block->instructions.emplace_back(std::move(sdwa));
- }
- } else if (instr->src[0].src.ssa->bit_size == 16) {
- if (dst.regClass() == s1) {
- bld.sop2(aco_opcode::s_and_b32, Definition(dst), bld.def(s1, scc), Operand(0xFFFFu), src);
- } else {
- assert(src.regClass() == v2b);
- aco_ptr<SDWA_instruction> sdwa{create_instruction<SDWA_instruction>(aco_opcode::v_mov_b32, asSDWA(Format::VOP1), 1, 1)};
- sdwa->operands[0] = Operand(src);
- sdwa->definitions[0] = Definition(dst);
- sdwa->sel[0] = sdwa_uword;
- sdwa->dst_sel = sdwa_udword;
- ctx->block->instructions.emplace_back(std::move(sdwa));
- }
- } else if (instr->src[0].src.ssa->bit_size == 64) {
- /* we can actually just say dst = src, as it would map the lower register */
- emit_extract_vector(ctx, src, 0, dst);
- } else {
- fprintf(stderr, "Unimplemented NIR instr bit size: ");
- nir_print_instr(&instr->instr, stderr);
- fprintf(stderr, "\n");
- }
- break;
- }