- if (pipeline->device->physical_device->rad_info.chip_class >= GFX7) {
- assert(lds_size <= 65536);
- lds_size = align(lds_size, 512) / 512;
- } else {
- assert(lds_size <= 32768);
- lds_size = align(lds_size, 256) / 256;
- }
- si_multiwave_lds_size_workaround(pipeline->device, &lds_size);
-
- tess.lds_size = lds_size;
-
- tess.ls_hs_config = S_028B58_NUM_PATCHES(num_patches) |
- S_028B58_HS_NUM_INPUT_CP(num_tcs_input_cp) |
- S_028B58_HS_NUM_OUTPUT_CP(num_tcs_output_cp);
- tess.num_patches = num_patches;
-
- struct radv_shader_variant *tes = radv_get_shader(pipeline, MESA_SHADER_TESS_EVAL);
- unsigned type = 0, partitioning = 0, topology = 0, distribution_mode = 0;
-
- switch (tes->info.tes.primitive_mode) {
- case GL_TRIANGLES:
- type = V_028B6C_TESS_TRIANGLE;
- break;
- case GL_QUADS:
- type = V_028B6C_TESS_QUAD;
- break;
- case GL_ISOLINES:
- type = V_028B6C_TESS_ISOLINE;
- break;
- }
-
- switch (tes->info.tes.spacing) {
- case TESS_SPACING_EQUAL:
- partitioning = V_028B6C_PART_INTEGER;
- break;
- case TESS_SPACING_FRACTIONAL_ODD:
- partitioning = V_028B6C_PART_FRAC_ODD;
- break;
- case TESS_SPACING_FRACTIONAL_EVEN:
- partitioning = V_028B6C_PART_FRAC_EVEN;
- break;
- default:
- break;
- }
-
- bool ccw = tes->info.tes.ccw;
- const VkPipelineTessellationDomainOriginStateCreateInfo *domain_origin_state =
- vk_find_struct_const(pCreateInfo->pTessellationState,
- PIPELINE_TESSELLATION_DOMAIN_ORIGIN_STATE_CREATE_INFO);
-
- if (domain_origin_state && domain_origin_state->domainOrigin != VK_TESSELLATION_DOMAIN_ORIGIN_UPPER_LEFT)
- ccw = !ccw;
-
- if (tes->info.tes.point_mode)
- topology = V_028B6C_OUTPUT_POINT;
- else if (tes->info.tes.primitive_mode == GL_ISOLINES)
- topology = V_028B6C_OUTPUT_LINE;
- else if (ccw)
- topology = V_028B6C_OUTPUT_TRIANGLE_CCW;
- else
- topology = V_028B6C_OUTPUT_TRIANGLE_CW;
-
- if (pipeline->device->physical_device->rad_info.has_distributed_tess) {
- if (pipeline->device->physical_device->rad_info.family == CHIP_FIJI ||
- pipeline->device->physical_device->rad_info.family >= CHIP_POLARIS10)
- distribution_mode = V_028B6C_DISTRIBUTION_MODE_TRAPEZOIDS;
- else
- distribution_mode = V_028B6C_DISTRIBUTION_MODE_DONUTS;
- } else
- distribution_mode = V_028B6C_DISTRIBUTION_MODE_NO_DIST;
-
- tess.tf_param = S_028B6C_TYPE(type) |
- S_028B6C_PARTITIONING(partitioning) |
- S_028B6C_TOPOLOGY(topology) |
- S_028B6C_DISTRIBUTION_MODE(distribution_mode);
-
- return tess;
-}
-
-static const struct radv_prim_vertex_count prim_size_table[] = {
- [V_008958_DI_PT_NONE] = {0, 0},
- [V_008958_DI_PT_POINTLIST] = {1, 1},
- [V_008958_DI_PT_LINELIST] = {2, 2},
- [V_008958_DI_PT_LINESTRIP] = {2, 1},
- [V_008958_DI_PT_TRILIST] = {3, 3},
- [V_008958_DI_PT_TRIFAN] = {3, 1},
- [V_008958_DI_PT_TRISTRIP] = {3, 1},
- [V_008958_DI_PT_LINELIST_ADJ] = {4, 4},
- [V_008958_DI_PT_LINESTRIP_ADJ] = {4, 1},
- [V_008958_DI_PT_TRILIST_ADJ] = {6, 6},
- [V_008958_DI_PT_TRISTRIP_ADJ] = {6, 2},
- [V_008958_DI_PT_RECTLIST] = {3, 3},
- [V_008958_DI_PT_LINELOOP] = {2, 1},
- [V_008958_DI_PT_POLYGON] = {3, 1},
- [V_008958_DI_PT_2D_TRI_STRIP] = {0, 0},
-};
-
-static const struct radv_vs_output_info *get_vs_output_info(const struct radv_pipeline *pipeline)
-{
- if (radv_pipeline_has_gs(pipeline))
- if (radv_pipeline_has_ngg(pipeline))
- return &pipeline->shaders[MESA_SHADER_GEOMETRY]->info.vs.outinfo;
- else
- return &pipeline->gs_copy_shader->info.vs.outinfo;
- else if (radv_pipeline_has_tess(pipeline))
- return &pipeline->shaders[MESA_SHADER_TESS_EVAL]->info.tes.outinfo;
- else
- return &pipeline->shaders[MESA_SHADER_VERTEX]->info.vs.outinfo;
-}
-
-static void
-radv_link_shaders(struct radv_pipeline *pipeline, nir_shader **shaders)
-{
- nir_shader* ordered_shaders[MESA_SHADER_STAGES];
- int shader_count = 0;
-
- if(shaders[MESA_SHADER_FRAGMENT]) {
- ordered_shaders[shader_count++] = shaders[MESA_SHADER_FRAGMENT];