+
+
+std::string
+MemIndexOp::generateDisassembly(
+ Addr pc, const Loader::SymbolTable *symtab) const
+{
+ std::stringstream ss;
+
+ ccprintf(ss, "%-10s ", mnemonic);
+
+ // Print the destination only for a load
+ if (!flags[IsStore]) {
+ if (_numDestRegs > 0) {
+
+ // If the instruction updates the source register with the
+ // EA, then this source register is placed in position 0,
+ // therefore we print the last destination register.
+ printReg(ss, destRegIdx(_numDestRegs-1));
+ }
+ }
+
+ // Print the data register for a store
+ else {
+ if (_numSrcRegs > 0) {
+ printReg(ss, srcRegIdx(0));
+ }
+ }
+
+ ss << ", ";
+
+ // Print the address registers for a load
+ if (!flags[IsStore]) {
+ if (_numSrcRegs > 1) {
+ printReg(ss, srcRegIdx(0));
+ ss << ", ";
+ printReg(ss, srcRegIdx(1));
+ }
+
+ // The first address register is skipped if it is R0
+ else if (_numSrcRegs > 0) {
+ ss << "0, ";
+ printReg(ss, srcRegIdx(0));
+ }
+ }
+
+ // Print the address registers for a store
+ else {
+ if (_numSrcRegs > 2) {
+ printReg(ss, srcRegIdx(1));
+ ss << ", ";
+ printReg(ss, srcRegIdx(2));
+ }
+
+ // The first address register is skipped if it is R0
+ else if (_numSrcRegs > 1) {
+ ss << "0, ";
+ printReg(ss, srcRegIdx(1));
+ }
+ }
+
+ return ss.str();
+}