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arch,cpu,sim: Eliminate the now empty kernel statistics classes.
[gem5.git]
/
src
/
arch
/
riscv
/
pagetable_walker.cc
diff --git
a/src/arch/riscv/pagetable_walker.cc
b/src/arch/riscv/pagetable_walker.cc
index 02d2d945b28b2b050f9d7341f13e010637c53618..786cb8193ed623f6591338eb0eefc4b11d2e281f 100644
(file)
--- a/
src/arch/riscv/pagetable_walker.cc
+++ b/
src/arch/riscv/pagetable_walker.cc
@@
-184,6
+184,11
@@
Walker::WalkerState::initState(ThreadContext * _tc,
tc = _tc;
mode = _mode;
timing = _isTiming;
tc = _tc;
mode = _mode;
timing = _isTiming;
+ // fetch these now in case they change during the walk
+ status = tc->readMiscReg(MISCREG_STATUS);
+ pmode = walker->tlb->getMemPriv(tc, mode);
+ satp = tc->readMiscReg(MISCREG_SATP);
+ assert(satp.mode == AddrXlateMode::SV39);
}
void
}
void
@@
-303,7
+308,8
@@
Walker::WalkerState::stepWalk(PacketPtr &write)
if (pte.r || pte.x) {
// step 5: leaf PTE
doEndWalk = true;
if (pte.r || pte.x) {
// step 5: leaf PTE
doEndWalk = true;
- fault = walker->tlb->checkPermissions(tc, entry.vaddr, mode, pte);
+ fault = walker->tlb->checkPermissions(status, pmode,
+ entry.vaddr, mode, pte);
// step 6
if (fault == NoFault) {
// step 6
if (fault == NoFault) {
@@
-380,10
+386,9
@@
Walker::WalkerState::stepWalk(PacketPtr &write)
if (!functional)
walker->tlb->insert(entry.vaddr, entry);
else {
if (!functional)
walker->tlb->insert(entry.vaddr, entry);
else {
- Addr offset = entry.vaddr & mask(entry.logBytes);
- Addr paddr = entry.paddr << PageShift | offset;
DPRINTF(PageTableWalker, "Translated %#x -> %#x\n",
DPRINTF(PageTableWalker, "Translated %#x -> %#x\n",
- entry.vaddr, paddr);
+ entry.vaddr, entry.paddr << PageShift |
+ (entry.vaddr & mask(entry.logBytes)));
}
}
endWalk();
}
}
endWalk();
@@
-413,10
+418,7
@@
Walker::WalkerState::endWalk()
void
Walker::WalkerState::setupWalk(Addr vaddr)
{
void
Walker::WalkerState::setupWalk(Addr vaddr)
{
- vaddr &= ((static_cast<Addr>(1) << VADDR_BITS) - 1);
-
- SATP satp = tc->readMiscReg(MISCREG_SATP);
- assert(satp.mode == AddrXlateMode::SV39);
+ vaddr &= (static_cast<Addr>(1) << VADDR_BITS) - 1;
Addr shift = PageShift + LEVEL_BITS * 2;
Addr idx = (vaddr >> shift) & LEVEL_MASK;
Addr shift = PageShift + LEVEL_BITS * 2;
Addr idx = (vaddr >> shift) & LEVEL_MASK;
@@
-483,12
+485,12
@@
Walker::WalkerState::recvPacket(PacketPtr pkt)
* permissions violations, so we'll need the return value as
* well.
*/
* permissions violations, so we'll need the return value as
* well.
*/
-
bool delayedResponse
;
- Fault fault = walker->tlb->doTranslate(req, tc, NULL, mode,
-
delayedRespons
e);
-
assert(!delayedResponse
);
+
Addr vaddr = req->getVaddr()
;
+ vaddr &= (static_cast<Addr>(1) << VADDR_BITS) - 1;
+
Addr paddr = walker->tlb->translateWithTLB(vaddr, satp.asid, mod
e);
+
req->setPaddr(paddr
);
// Let the CPU continue.
// Let the CPU continue.
- translation->finish(
f
ault, req, tc, mode);
+ translation->finish(
NoF
ault, req, tc, mode);
} else {
// There was a fault during the walk. Let the CPU know.
translation->finish(timingFault, req, tc, mode);
} else {
// There was a fault during the walk. Let the CPU know.
translation->finish(timingFault, req, tc, mode);