- tc->setMiscReg(MISCREG_RFLAGS, 0x0000000000000002ULL);
-
- tc->setMiscReg(MISCREG_EFER, 0);
-
- SegAttr dataAttr = 0;
- dataAttr.writable = 1;
- dataAttr.readable = 1;
- dataAttr.expandDown = 0;
- dataAttr.dpl = 0;
- dataAttr.defaultSize = 0;
-
- for (int seg = 0; seg != NUM_SEGMENTREGS; seg++) {
- tc->setMiscReg(MISCREG_SEG_SEL(seg), 0);
- tc->setMiscReg(MISCREG_SEG_BASE(seg), 0);
- tc->setMiscReg(MISCREG_SEG_LIMIT(seg), 0xffff);
- tc->setMiscReg(MISCREG_SEG_ATTR(seg), dataAttr);
- }
-
- SegAttr codeAttr = 0;
- codeAttr.writable = 0;
- codeAttr.readable = 1;
- codeAttr.expandDown = 0;
- codeAttr.dpl = 0;
- codeAttr.defaultSize = 0;
-
- tc->setMiscReg(MISCREG_CS, 0xf000);
- tc->setMiscReg(MISCREG_CS_BASE, 0x00000000ffff0000ULL);
- // This has the base value pre-added.
- tc->setMiscReg(MISCREG_CS_LIMIT, 0xffffffff);
- tc->setMiscReg(MISCREG_CS_ATTR, codeAttr);
-
- tc->setPC(0x000000000000fff0ULL +
- tc->readMiscReg(MISCREG_CS_BASE));
- tc->setNextPC(tc->readPC() + sizeof(MachInst));
-
- tc->setMiscReg(MISCREG_GDTR_BASE, 0);
- tc->setMiscReg(MISCREG_GDTR_LIMIT, 0xffff);
-
- tc->setMiscReg(MISCREG_IDTR_BASE, 0);
- tc->setMiscReg(MISCREG_IDTR_LIMIT, 0xffff);
-
- tc->setMiscReg(MISCREG_LDTR, 0);
- tc->setMiscReg(MISCREG_LDTR_BASE, 0);
- tc->setMiscReg(MISCREG_LDTR_LIMIT, 0xffff);
- tc->setMiscReg(MISCREG_LDTR_ATTR, 0);
-
- tc->setMiscReg(MISCREG_TR, 0);
- tc->setMiscReg(MISCREG_TR_BASE, 0);
- tc->setMiscReg(MISCREG_TR_LIMIT, 0xffff);
- tc->setMiscReg(MISCREG_TR_ATTR, 0);
-
- // This value should be the family/model/stepping of the processor.
- // (page 418). It should be consistent with the value from CPUID, but the
- // actual value probably doesn't matter much.
- tc->setIntReg(INTREG_RDX, 0);
-