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hsail: Fix disassembly of load instruction with 3 destination operands
[gem5.git]
/
src
/
arch
/
x86
/
vtophys.cc
diff --git
a/src/arch/x86/vtophys.cc
b/src/arch/x86/vtophys.cc
index 9fd9cc78d21c78981bef193d40b7fb052158163b..4bbeb7119a77a3590f5373f98b2c892389624416 100644
(file)
--- a/
src/arch/x86/vtophys.cc
+++ b/
src/arch/x86/vtophys.cc
@@
-45,7
+45,6
@@
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "debug/VtoPhys.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "debug/VtoPhys.hh"
-#include "sim/fault_fwd.hh"
using namespace std;
using namespace std;