+ if (state->thrend_found &&
+ state->last_thrsw_ip - state->ip <= 2 &&
+ inst->type == V3D_QPU_INSTR_TYPE_ALU) {
+ if ((inst->alu.add.op != V3D_QPU_A_NOP &&
+ !inst->alu.add.magic_write)) {
+ fail_instr(state, "RF write after THREND");
+ }
+
+ if ((inst->alu.mul.op != V3D_QPU_M_NOP &&
+ !inst->alu.mul.magic_write)) {
+ fail_instr(state, "RF write after THREND");
+ }
+
+ if (v3d_qpu_sig_writes_address(devinfo, &inst->sig))
+ fail_instr(state, "RF write after THREND");
+
+ /* GFXH-1625: No TMUWT in the last instruction */
+ if (state->last_thrsw_ip - state->ip == 2 &&
+ inst->alu.add.op == V3D_QPU_A_TMUWT)
+ fail_instr(state, "TMUWT in last instruction");
+ }
+