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mem: Make the XBar responsible for tracking response routing
[gem5.git]
/
src
/
cpu
/
legiontrace.cc
diff --git
a/src/cpu/legiontrace.cc
b/src/cpu/legiontrace.cc
index 484af1008b279be9fe65fd6784b7a76706f55635..b94b8f5fef7abfded6415696162cbb1df7b632f8 100644
(file)
--- a/
src/cpu/legiontrace.cc
+++ b/
src/cpu/legiontrace.cc
@@
-36,42
+36,32
@@
#error Legion tracing only works with SPARC simulations!
#endif
#error Legion tracing only works with SPARC simulations!
#endif
-#include "config/full_system.hh"
-#if !FULL_SYSTEM
- #error Legion tracing only works in full system!
-#endif
-
#include <sys/ipc.h>
#include <sys/shm.h>
#include <cstdio>
#include <iomanip>
#include <sys/ipc.h>
#include <sys/shm.h>
#include <cstdio>
#include <iomanip>
-#include "arch/sparc/
pre
decoder.hh"
+#include "arch/sparc/decoder.hh"
#include "arch/sparc/registers.hh"
#include "arch/sparc/utility.hh"
#include "arch/sparc/registers.hh"
#include "arch/sparc/utility.hh"
+#include "arch/tlb.hh"
#include "base/socket.hh"
#include "cpu/base.hh"
#include "base/socket.hh"
#include "cpu/base.hh"
-#include "cpu/decode.hh"
#include "cpu/legiontrace.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
#include "cpu/legiontrace.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
+#include "sim/full_system.hh"
#include "sim/system.hh"
#include "sim/system.hh"
-#if FULL_SYSTEM
-#include "arch/tlb.hh"
-#endif
-
//XXX This is temporary
#include "cpu/m5legion_interface.h"
using namespace std;
using namespace TheISA;
//XXX This is temporary
#include "cpu/m5legion_interface.h"
using namespace std;
using namespace TheISA;
-#if FULL_SYSTEM
static int diffcount = 0;
static bool wasMicro = false;
static int diffcount = 0;
static bool wasMicro = false;
-#endif
namespace Trace {
SharedData *shared_data = NULL;
namespace Trace {
SharedData *shared_data = NULL;
@@
-155,7
+145,6
@@
Trace::LegionTraceRecord::dump()
{
ostream &outs = Trace::output();
{
ostream &outs = Trace::output();
- static TheISA::Predecoder predecoder(NULL);
// Compare
bool compared = false;
bool diffPC = false;
// Compare
bool compared = false;
bool diffPC = false;
@@
-167,7
+156,7
@@
Trace::LegionTraceRecord::dump()
bool diffTnpc = false;
bool diffTstate = false;
bool diffTt = false;
bool diffTnpc = false;
bool diffTstate = false;
bool diffTt = false;
- bool diffTba = false;
+ bool diffTba
M5_VAR_USED
= false;
bool diffHpstate = false;
bool diffHtstate = false;
bool diffHtba = false;
bool diffHpstate = false;
bool diffHtstate = false;
bool diffHtba = false;
@@
-432,15
+421,13
@@
Trace::LegionTraceRecord::dump()
<< staticInst->disassemble(m5Pc, debugSymbolTable)
<< endl;
<< staticInst->disassemble(m5Pc, debugSymbolTable)
<< endl;
-
predecoder.setTC(thread
);
-
predecoder.
moreBytes(m5Pc, m5Pc, shared_data->instruction);
+
TheISA::Decoder *decoder = thread->getDecoderPtr(
);
+
decoder->
moreBytes(m5Pc, m5Pc, shared_data->instruction);
- assert(
predecoder.extMachI
nstReady());
+ assert(
decoder->i
nstReady());
PCState tempPC = pc;
PCState tempPC = pc;
- StaticInstPtr legionInst =
- thread->getDecoderPtr()->decode(
- predecoder.getExtMachInst(tempPC), lgnPc);
+ StaticInstPtr legionInst = decoder->decode(tempPC);
outs << setfill(' ') << setw(15)
<< " Legion Inst: "
<< "0x" << setw(8) << setfill('0') << hex
outs << setfill(' ') << setw(15)
<< " Legion Inst: "
<< "0x" << setw(8) << setfill('0') << hex
@@
-548,7
+535,7
@@
Trace::LegionTraceRecord::dump()
}
if (diffTlb) {
printColumnLabels(outs);
}
if (diffTlb) {
printColumnLabels(outs);
- char label[
8
];
+ char label[
9
];
for (int x = 0; x < 64; x++) {
if (shared_data->itb[x] !=
ULL(0xFFFFFFFFFFFFFFFF) ||
for (int x = 0; x < 64; x++) {
if (shared_data->itb[x] !=
ULL(0xFFFFFFFFFFFFFFFF) ||
@@
-597,5
+584,7
@@
Trace::LegionTraceRecord::dump()
Trace::LegionTrace *
LegionTraceParams::create()
{
Trace::LegionTrace *
LegionTraceParams::create()
{
+ if (!FullSystem)
+ panic("Legion tracing only works in full system!");
return new Trace::LegionTrace(this);
};
return new Trace::LegionTrace(this);
};