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Automated merge with ssh://hg@repo.m5sim.org/m5
[gem5.git]
/
src
/
dev
/
x86
/
i8237.cc
diff --git
a/src/dev/x86/i8237.cc
b/src/dev/x86/i8237.cc
index 5afe6b91ac3e01651fa7913cd4f1ff0340c78747..a43c1ec91ab856ecd053ab4b1a3d5e0aa2ac021a 100644
(file)
--- a/
src/dev/x86/i8237.cc
+++ b/
src/dev/x86/i8237.cc
@@
-63,6
+63,7
@@
X86ISA::I8237::read(PacketPtr pkt)
default:
panic("Read from undefined i8237 register %d.\n", offset);
}
default:
panic("Read from undefined i8237 register %d.\n", offset);
}
+ pkt->makeAtomicResponse();
return latency;
}
return latency;
}
@@
-118,11
+119,24
@@
X86ISA::I8237::write(PacketPtr pkt)
case 0xf:
panic("Write to i8237 write all mask register bits unimplemented.\n");
default:
case 0xf:
panic("Write to i8237 write all mask register bits unimplemented.\n");
default:
- panic("Write to undefined i82
54
register.\n");
+ panic("Write to undefined i82
37
register.\n");
}
}
+ pkt->makeAtomicResponse();
return latency;
}
return latency;
}
+void
+X86ISA::I8237::serialize(std::ostream &os)
+{
+ SERIALIZE_SCALAR(maskReg);
+}
+
+void
+X86ISA::I8237::unserialize(Checkpoint *cp, const std::string §ion)
+{
+ UNSERIALIZE_SCALAR(maskReg);
+}
+
X86ISA::I8237 *
I8237Params::create()
{
X86ISA::I8237 *
I8237Params::create()
{