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ir3: Add ir3_trim_constlen()
[mesa.git]
/
src
/
freedreno
/
ir3
/
ir3.h
diff --git
a/src/freedreno/ir3/ir3.h
b/src/freedreno/ir3/ir3.h
index bdfce559aab5c89efce057cd51bb5b7a12b1e169..51315a5f361530e40373190de70d1dc0dbfa757d 100644
(file)
--- a/
src/freedreno/ir3/ir3.h
+++ b/
src/freedreno/ir3/ir3.h
@@
-44,7
+44,7
@@
struct ir3_instruction;
struct ir3_block;
struct ir3_info {
struct ir3_block;
struct ir3_info {
- uint32_t gpu_id;
+ void *data; /* used internally in ir3 assembler */
uint16_t sizedwords;
uint16_t instrs_count; /* expanded to account for rpt's */
uint16_t nops_count; /* # of nop instructions, including nopN */
uint16_t sizedwords;
uint16_t instrs_count; /* expanded to account for rpt's */
uint16_t nops_count; /* # of nop instructions, including nopN */
@@
-554,10
+554,12
@@
block_id(struct ir3_block *block)
#endif
}
#endif
}
-struct ir3 * ir3_create(struct ir3_compiler *compiler, gl_shader_stage type);
+struct ir3_shader_variant;
+
+struct ir3 * ir3_create(struct ir3_compiler *compiler, struct ir3_shader_variant *v);
void ir3_destroy(struct ir3 *shader);
void ir3_destroy(struct ir3 *shader);
-void * ir3_assemble(struct ir3 *shader,
-
struct ir3_info *info, uint32_t gpu_id
);
+
+
void * ir3_assemble(struct ir3_shader_variant *v
);
void * ir3_alloc(struct ir3 *shader, int sz);
struct ir3_block * ir3_block_create(struct ir3 *shader);
void * ir3_alloc(struct ir3 *shader, int sz);
struct ir3_block * ir3_block_create(struct ir3 *shader);
@@
-1312,7
+1314,7
@@
bool ir3_sched_add_deps(struct ir3 *ir);
int ir3_sched(struct ir3 *ir);
struct ir3_context;
int ir3_sched(struct ir3 *ir);
struct ir3_context;
-bool ir3_postsched(struct ir3 *ir);
+bool ir3_postsched(struct ir3 *ir
, struct ir3_shader_variant *v
);
bool ir3_a6xx_fixup_atomic_dests(struct ir3 *ir, struct ir3_shader_variant *so);
bool ir3_a6xx_fixup_atomic_dests(struct ir3 *ir, struct ir3_shader_variant *so);