+ <!-- 0x8e00-0x8e03 invalid -->
+ <reg32 offset="0x8e04" name="RB_UNKNOWN_8E04"/> <!-- TODO: valid mask 0xfffffeff -->
+ <reg32 offset="0x8e05" name="RB_ADDR_MODE_CNTL" pos="0" type="boolean"/>
+ <!-- 0x8e06 invalid -->
+ <reg32 offset="0x8e07" name="RB_CCU_CNTL">
+ <!-- offset into GMEM for something.
+ important for sysmem path
+ BLIT_OP_SCALE also writes to GMEM at this offset for GMEM store
+ blob values for GMEM path (note: close to GMEM size):
+ a618: 0x7c000 a630/a640: 0xf8000 a650: 0x114000
+ SYSMEM path values:
+ a618: 0x10000 a630/a640: 0x20000 a650: 0x30000
+ TODO: valid mask 0xfffffc1f
+ -->
+ <bitfield name="OFFSET" low="23" high="31" shr="12" type="hex"/>
+ <bitfield name="GMEM" pos="22" type="boolean"/> <!-- set for GMEM path -->
+ <bitfield name="UNK2" pos="2" type="boolean"/> <!-- sometimes set with GMEM? -->
+ </reg32>
+ <reg32 offset="0x8e08" name="RB_NC_MODE_CNTL">
+ <bitfield name="MODE" pos="0" type="boolean"/>
+ <bitfield name="LOWER_BIT" low="1" high="2" type="uint"/>
+ <bitfield name="MIN_ACCESS_LENGTH" pos="3" type="boolean"/> <!-- true=64b false=32b -->
+ <bitfield name="AMSBC" pos="4" type="boolean"/>
+ <bitfield name="UPPER_BIT" pos="10" type="uint"/>
+ <bitfield name="RGB565_PREDICATOR" pos="11" type="boolean"/>
+ <bitfield name="UNK12" low="12" high="13"/>
+ </reg32>
+ <!-- 0x8e09-0x8e0f invalid -->
+ <reg32 offset="0x8e10" name="RB_PERFCTR_RB_SEL_0"/>
+ <reg32 offset="0x8e11" name="RB_PERFCTR_RB_SEL_1"/>
+ <reg32 offset="0x8e12" name="RB_PERFCTR_RB_SEL_2"/>
+ <reg32 offset="0x8e13" name="RB_PERFCTR_RB_SEL_3"/>
+ <reg32 offset="0x8e14" name="RB_PERFCTR_RB_SEL_4"/>
+ <reg32 offset="0x8e15" name="RB_PERFCTR_RB_SEL_5"/>
+ <reg32 offset="0x8e16" name="RB_PERFCTR_RB_SEL_6"/>
+ <reg32 offset="0x8e17" name="RB_PERFCTR_RB_SEL_7"/>
+ <reg32 offset="0x8e18" name="RB_PERFCTR_CCU_SEL_0"/>
+ <reg32 offset="0x8e19" name="RB_PERFCTR_CCU_SEL_1"/>
+ <reg32 offset="0x8e1a" name="RB_PERFCTR_CCU_SEL_2"/>
+ <reg32 offset="0x8e1b" name="RB_PERFCTR_CCU_SEL_3"/>
+ <reg32 offset="0x8e1c" name="RB_PERFCTR_CCU_SEL_4"/>
+ <!-- 0x8e1d-0x8e1f invalid -->
+ <!-- 0x8e20-0x8e25 more perfcntr sel? -->
+ <!-- 0x8e26-0x8e27 invalid -->
+ <reg32 offset="0x8e28" name="RB_UNKNOWN_8E28" low="0" high="10"/>
+ <!-- 0x8e29-0x8e2b invalid -->
+ <reg32 offset="0x8e2c" name="RB_PERFCTR_CMP_SEL_0"/>
+ <reg32 offset="0x8e2d" name="RB_PERFCTR_CMP_SEL_1"/>
+ <reg32 offset="0x8e2e" name="RB_PERFCTR_CMP_SEL_2"/>
+ <reg32 offset="0x8e2f" name="RB_PERFCTR_CMP_SEL_3"/>
+ <reg32 offset="0x8e3b" name="RB_RB_SUB_BLOCK_SEL_CNTL_HOST"/>
+ <reg32 offset="0x8e3d" name="RB_RB_SUB_BLOCK_SEL_CNTL_CD"/>
+ <!-- 0x8e3e-0x8e4f invalid -->
+ <!-- GMEM save/restore for preemption: -->
+ <reg32 offset="0x8e50" name="RB_CONTEXT_SWITCH_GMEM_SAVE_RESTORE" pos="0" type="boolean"/>
+ <!-- address for GMEM save/restore? -->
+ <reg32 offset="0x8e51" name="RB_UNKNOWN_8E51" type="waddress" align="1"/>
+ <!-- 0x8e53-0x8e7f invalid -->
+ <!-- 0x8e80-0x8e83 are valid -->
+ <!-- 0x8e84-0x90ff invalid -->
+
+ <!-- 0x9000-0x90ff invalid -->
+
+ <!-- something to do with geometry shader: -->
+ <reg32 offset="0x9100" name="VPC_UNKNOWN_9100" low="0" high="7"/>
+
+ <bitset name="a6xx_vpc_xs_clip_cntl" inline="yes">
+ <bitfield name="CLIP_MASK" low="0" high="7" type="uint"/>
+ <!-- there can be up to 8 total clip/cull distance outputs,
+ but apparenly VPC can only deal with vec4, so when there are
+ more than 4 outputs a second location needs to be programmed
+ -->
+ <bitfield name="CLIP_DIST_03_LOC" low="8" high="15" type="uint"/>
+ <bitfield name="CLIP_DIST_47_LOC" low="16" high="23" type="uint"/>
+ </bitset>
+ <reg32 offset="0x9101" name="VPC_VS_CLIP_CNTL" type="a6xx_vpc_xs_clip_cntl"/>
+ <reg32 offset="0x9102" name="VPC_GS_CLIP_CNTL" type="a6xx_vpc_xs_clip_cntl"/>
+ <reg32 offset="0x9103" name="VPC_DS_CLIP_CNTL" type="a6xx_vpc_xs_clip_cntl"/>