+/* This enum describes how an opcode calculates its result. */
+enum tgsi_output_mode {
+ /** The opcode produces no result. */
+ TGSI_OUTPUT_NONE = 0,
+
+ /** When this opcode writes to a channel of the destination register,
+ * it takes as arguments values from the same channel of the source
+ * register(s).
+ *
+ * Example: TGSI_OPCODE_ADD
+ */
+ TGSI_OUTPUT_COMPONENTWISE = 1,
+
+ /** This opcode writes the same value to all enabled channels of the
+ * destination register.
+ *
+ * Example: TGSI_OPCODE_RSQ
+ */
+ TGSI_OUTPUT_REPLICATE = 2,
+
+ /** The operation performed by this opcode is dependent on which channel
+ * of the destination register is being written.
+ *
+ * Example: TGSI_OPCODE_LOG
+ */
+ TGSI_OUTPUT_CHAN_DEPENDENT = 3,
+
+ /**
+ * Example: TGSI_OPCODE_TEX
+ */
+ TGSI_OUTPUT_OTHER = 4
+};
+